Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2003-02-21
2003-11-04
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S659000
Reexamination Certificate
active
06642622
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-053212, filed Feb. 28, 2002, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and in particular, to a multilayer interconnected structure used to effectively release heat generated by interconnecting layers out of semiconductor device.
2. Description of the Related Art
In recent years, a multilayer interconnected structure has been employed to deal with finer semiconductor devices and their high-level integration.
A factor that determines an upper limit on current density or current that can be applied to interconnecting layers in an LSI (Large Scale Integrated Circuit) is an increase in temperature caused by electromigration (EM) in the interconnecting layers and Joule heat from them. The amount of heat generated by all interconnecting layers in the LSI is calculated by adding amounts of joule heat from these interconnecting layers together. Heat in any interconnecting layer results in a difference in temperature between the device and its exterior. Thus, heat is released to the exterior of the LSI in proportion to the difference in temperature×heat conductivity×the area of the interconnecting layer. Where the amount of heat generated and the amount of heat released (proportional to the difference in temperature) are in balance, a thermally balanced state is established. The difference in temperature measured at that time corresponds to an increase in the temperature of the LSI.
Insulating material generally has a low heat conductivity. Various insulating materials used for an LSI generally have a heat conductivity of about 0.10 W/mK to 5.00 W/mK. On the other hand, metal material has a heat conductivity of 30 W/mk to 400 W/mk, which is much higher than the insulating material. Thus, large differences in heat conductivity among materials result in difficulty to release heat out of the LSI device. Material having a high heat conductivity must be used for portions of the device from which heat must be released out of the device, so as to efficiently release heat from the interconnecting layers out of the device.
To efficiently release heat from each interconnecting layer to the exterior, it is contemplated that material used may be selected so that heat can be transmitted toward a front surface, where a passivation film is located (upward), or toward a semiconductor substrate (downward). To facilitate heat release toward the semiconductor substrate, it is contemplated that material having a high heat conductivity may be used for metal plugs connecting the interconnecting layers and the substrate together and that the percentage of the entire cross section taken up by the cross section of the metal plugs may be increased as much as possible. However, a large number of elements such as transistors and capacitors are formed on the substrate, with the number of elements increasing consistently with the density of the LSI. Accordingly, this approach hinders an increase in the density of the LSI.
On the other hand, in the multilayer interconnected structure of a conventional LSI, a silicon oxide film, a silicon nitride film, or a film formed by stacking these films together is generally used as a passivation film used to prevent moisture, contaminants, and the like from entering the interior of the device. The silicon oxide film and the silicon nitride film have very low heat conductivities. Further, the conventional passivation film covers the entire front surface of the LSI device except for its part on a pad electrode layer. Consequently, conventional LSI products release only a small amount of heat to the exterior. Improving the heat release characteristic of the passivation film is very effective in suppressing an increase in the temperature of the interconnects in the LSI.
Copper is preferable as a material for an interconnecting layer because it has more tolerance to electromigration and less resistance than aluminum. However, if copper or the like is used as a material for interconnecting layers, larger current can be applied. This increases the amount of Joule heat generated by each interconnecting layer. In this case, the allowable amount of current applied is limited by the external heat release characteristic.
Further, when copper or the like is used as interconnecting layer material, it is necessary to use an insulating film of a small dielectric constant to reduce parasitic capacity to maintain the appropriate value of the interconnect resistance. The insulating film of a small dielectric constant is constructed to be porous and thus has a low heat conductivity. Thus, heat generated by surrounding interconnecting layers is not released to the exterior. Further, a more serious problem occurs if a so-called aerial interconnected structure is used to drastically reduce the parasitic capacity.
In particular, if copper is used for interconnecting layers in an LSI having multilayer interconnecting layers, the amount of heat generated by all interconnecting layers increases consistently with the total number of interconnecting layers increasing. Accordingly, the temperature of the LSI is likely to increase rapidly. Therefore, measures are required for preventing the performance of LSI products from being degraded and maintaining reliability for a long time.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate, a first insulating film provided above the semiconductor substrate, a first interconnecting layer provided on the first insulating film, a second insulating film provided above the first interconnecting layer and the first insulating layer, a first protective film provided above the second insulating film, composed substantially of metal material, and a second protective film composed substantially of a passivity of the metal material, provided on a surface of the first protective film.
REFERENCES:
patent: 10-199882 (1998-07-01), None
patent: 10-335327 (1998-12-01), None
Ito Sachiyo
Usui Takamasa
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