Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Patent
1996-01-23
1997-07-15
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
257539, 257577, 257591, H01L 2900
Patent
active
056486766
ABSTRACT:
A semiconductor device has a first-conduction-type semiconductor substrate (19), an internal circuit including a vertical bipolar transistor (18) formed in a second-conduction-type semiconductor layer (20), and a protective element (14). The protective element comprises a first-conduction-type diffusion layer (22a) formed at an upper part of a second-conduction-type semiconductor layer (20a) disposed on the semiconductor substrate (19), and a second-conduction-type diffusion layer (27, 30) formed in the first-conduction-type diffusion layer (22a). The diffusion layer (27, 30) is at least partly deeper than an emitter diffusion layer (23) of the vertical bipolar transistor (18).
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patent: 4543593 (1985-09-01), Fujita
patent: 4847724 (1989-07-01), Renous
patent: 5151765 (1992-09-01), Yamauchi
Patent Abstracts of Japan, vol. 11, No. 187 (E-516) 16 Jun. 1987 & JP-A-62-018063 (NEC Corp) 27 Jan. 1987.
Tailliet et al., "Characterization of an n-p-n Structure under ESD Stress and Proposed Electrical Model," IEEE Transactions on Electron Devices, vol. 37, No. 4, Apr. 1990, New York, NY, pp. 1111-1120.
Iwai Takashi
Nakano Moto'o
Crane Sara W.
Fujitsu Limited
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