Semiconductor device with power noise suppression

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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Details

C257S685000, C257S686000, C257S724000, C257S904000, C257S924000, C257SE23141, C257SE23144, C257SE23145, C257SE25029

Reexamination Certificate

active

08049303

ABSTRACT:
A semiconductor chip and a semiconductor device mounting the semiconductor chip capable of increasing a capacitance of a capacitor without reducing the number of signal bumps or power bumps of a package and the number of C4solder balls of the semiconductor chip, and achieving a stable power supply with suppressing fluctuations of power at a resonance frequency without a limitation in a position to mount a capacitor for lowering noise of a signal transceiving interface block. In the semiconductor device, a via hole is provided to the semiconductor chip, a power-supply electrode connected to the via hole is provided to a back surface of the semiconductor chip, and a capacitor is mounted to the electrode on the back surface. And, a high-resistance material is used for a material of a power-supply via hole inside the semiconductor chip, thereby increasing the resistance and lowering the Q factor.

REFERENCES:
patent: 6873035 (2005-03-01), Watanabe et al.
patent: 7233065 (2007-06-01), Watanabe et al.
patent: 2002/0074669 (2002-06-01), Watanabe et al.
patent: 2007/0105304 (2007-05-01), Kasai et al.
patent: 2002-170920 (2002-06-01), None
patent: 2002-184933 (2002-06-01), None
patent: 2003-332515 (2003-11-01), None
patent: 2005-340555 (2005-12-01), None
patent: 2006-173407 (2006-06-01), None
patent: WO 2007/036994 (2007-04-01), None

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