Semiconductor device with PN junction isolation for TTL or ECL c

Details Semiconductor device with PN junction isolation for TTL or ECL c Semiconductor device with PN junction isolation for TTL or ECL c

1988-10-12

1989-12-19

Mintel, William

357 48, 357 92, 357 43, H01L 2948

Patent

active

048886238

ABSTRACT:
Electrostatical breakage of a semiconductor device, including an epitaxial layer and a buried layer thereunder, connected to an outer signal terminal, can be prevented by forming an impurity region in the epitaxial layer so as to form a PN junction between the buried layer and the impurity region. The impurity region is connected to a power source or ground.

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