Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-10-11
2004-08-31
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S701000, C257S787000, C257S750000, C257S763000
Reexamination Certificate
active
06784528
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device using a semiconductor integrated circuit, a stacked type semiconductor device, and a manufacturing method of a semiconductor device.
BACKGROUND OF THE INVENTION
In a field of a compact portable electric device, performance of electric parts installed in an electric device has been improved as well as miniaturization and weight saving thereof. In order to realize high performance of the electric parts as well as the miniaturization thereof, the electric parts are packaged in a highly dense manner, and a limited space in the electric device is efficiently used.
Discrete electric parts such as a semiconductor integrated circuit, a chip resistor, and a chip capacitor are provided on a substrate, and they are packaged on an electric device in combination with the substrate. Then, it may be advantageous that: by using a substrate whose rigidity is low and flexibility is high so as to freely bend the substrate, a space in the electric device is efficiently used. The substrate is bent, which causes the discrete electric part provided in the substrate to be bent, so that it is necessary to process the discrete electric part itself so as to be freely bent.
Japanese Unexamined Patent Publication No. 277683/2000 (Tokukai 2000-277683, Publication date: Oct. 6, 2000, corresponding U.S. Pat. No. 6,392,143, Date of Patent: May 21, 2002) discloses a semiconductor device such that: a semiconductor integrated circuit therein is made extremely thin, so that the substrate can be bent and the semiconductor integrated circuit can be curved. The semiconductor device disclosed in the publication can be packaged on a curved surface because the semiconductor integrated circuit and the substrate that are superior in the flexibility are used.
However, in the semiconductor device of Tokukai 2000-277683, complicated manufacturing step and a long time are required in electrically connecting the semiconductor integrated circuit to the substrate.
That is, as shown in FIG.
12
and
FIG. 13
, the semiconductor device of the foregoing publication is arranged by using a gold bump
65
(
FIG. 12
) or a solder
66
(
FIG. 13
) as a connection wiring that connects an externally connecting terminal
62
provided on a substrate
61
to an electrode pad
64
provided on a semiconductor integrated circuit
63
. In a case where the gold bump
65
is used as the connection wiring, it is necessary to provide the gold bump
65
on a semiconductor integrated circuit
63
before providing the semiconductor integrated circuit on the substrate
61
. Therefore, a manufacturing step for forming the gold bump
65
is required, so that a time taken to manufacture the semiconductor device is increased. Further, in a case where the solder bump
66
is used as the connection wiring, it is necessary to apply solder to a connection point between a metallic wiring
62
and the electrode pad
64
, so that the manufacturing step is complicated.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor device and a stacked type semiconductor device that can realize miniaturization of an electric device by providing with a semiconductor integrated circuit and a substrate superior in the flexibility so as to efficiently use a space in the electric device, and to provide a manufacturing method of the semiconductor device in which it is possible to shorten a time taken to manufacture the semiconductor device by simplifying a providing method of a wiring that electrically connects the semiconductor integrated circuit to the substrate.
In order to solve the foregoing problem, the semiconductor manufacturing method of the present invention includes the steps of: (i) fixing a semiconductor integrated circuit, that is covered with an insulating layer except for an electrode area having an electrode, on a formation side of a substrate having a connection portion connected to the semiconductor integrated circuit so that the electrode is exposed; (ii) providing a base metallic film on a wiring area on which a wiring for electrically connecting the electrode to the connection portion is provided; and (iii) providing the wiring on the base metallic film of the wiring area in accordance with plating.
According to the method, the semiconductor integrated circuit is fixed on the substrate, and plating is performed on the base metallic film of the wiring area, so that a plating metal is deposited on the base metallic film so as to constitute the wiring. Thus, it is possible to electrically connect the connection portion on the substrate to the semiconductor integrated circuit. Therefore, it is not necessary that the substrate is connected to the semiconductor integrated circuit in accordance with a step of providing the wiring on the semiconductor integrated circuit in advance or in accordance with a step of applying a solder to a joint between the substrate and the semiconductor integrated circuit like conventional methods, but it is possible to readily provide the wiring in accordance with the plating. As a result, manufacturing steps of the semiconductor device are simplified, and a time taken to manufacture the semiconductor device is shortened, so that it is possible to reduce the manufacturing cost.
Further, the semiconductor device of the present invention includes: a substrate whose formation side has a connection member thereon; a semiconductor integrated circuit, having an electrode and covered with an insulating layer except for an electrode area having the electrode, which is fixed on the formation side so that the electrode area is exposed; and a wiring that is provided in accordance with plating so as to electrically connect the electrode to the connection member.
According to the arrangement, the electrode is connected to the connection member via the wiring constituted of the plating, so that it is possible to obtain the semiconductor device that can be easily manufactured. Further, the wiring is provided in accordance with the plating, so that it is possible to provide the semiconductor device that realizes a lower cost.
Note that, the connection member is a member, provided on the formation side of the substrate, that is electrically connected to the electrode of the semiconductor integrated circuit via the wiring. Examples of the connection member include a terminal connected to an external device, an electrode of another semiconductor integrated circuit, and a discrete electric part, such as a resistor and a capacitor, other than the semiconductor integrated circuit.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5023697 (1991-06-01), Tsumura
patent: 5293066 (1994-03-01), Tsumura
patent: 6140583 (2000-10-01), Suzuki et al.
patent: 6392143 (2002-05-01), Koshio
patent: 63271939 (1988-11-01), None
Ishio Toshiya
Mori Katsunobu
Nakanishi Hiroyuki
Flynn Nathan J.
Greene Pershelle L
Sharp Kabushiki Kaisha
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