Semiconductor device with multiple plate vertically aligned capa

Details Semiconductor device with multiple plate vertically aligned capa Semiconductor device with multiple plate vertically aligned capa

1980-06-12

1984-07-17

Clawson, Jr., Joseph E.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 41, 357 51, 365182, 357 2311, 357 2314, H01L 2978

Patent

active

044609116

ABSTRACT:
A high packing density is obtained in a memory by stacking the capacitors of adjacent columns in such a manner that two capacitors of different columns are formed by three conductive layers situated one above the other. The central layer can be connected to a reference voltage, while the uppermost layer is connected to a transistor in one column and lowermost layer is connected to a transistor in the other column.

REFERENCES:
patent: 4131906 (1978-12-01), Kinoshita
patent: 4197554 (1980-04-01), Meusburger et al.

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