Semiconductor device with MISFET-controlled thyristor

Details Semiconductor device with MISFET-controlled thyristor Semiconductor device with MISFET-controlled thyristor

1992-09-14

1994-06-07

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Combined with field effect transistor

257132, 257133, 257168, 257365, H01L 2974, H01L 31111, H01L 2976

Patent

active

053192214

ABSTRACT:
MOS-controlled thyristor is formed of a P-type first base layer (23), an N-type floating emitter layer (24), and a P-type second base layer (25) on an N.sup.- -type base layer (14), by a double diffusion process. The thyristor mode is realized early on and conduction in a parasitic thyristor is prevented by forming a source layer (17) in the second base layer (25) to restrict the current flowing through the second base layer (25). The semiconductor has high withstand voltage, low resistance over the entire device, suppresses the occurrence of discontinuity in the voltage-current curve, and is capable of suppressing the latch-up phenomenon and controlling large currents.

REFERENCES:
patent: 5194927 (1993-03-01), Ueno
Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs (1991) (pp. 128-131), Shekar et al., "Experimental Demonstration of the Emitter Switched Thyristor".
Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs (pp. 132-137), Sumida et al., "Numerical Analysis of Switching in the IGBT Triggered Thyristor".

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