Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Patent
1993-08-12
1995-01-17
Limanek, Robert P.
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
257192, H01L 2714
Patent
active
053828143
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. FIELD OF THE INVENTION
This invention relates to a semiconductor device. More particularly, though not exclusively, it relates to such devices which are heterostructures of narrow bandgap semiconductor materials.
2. DISCUSSION OF PRIOR ART
Narrow bandgap semiconductors such as InSb have useful properties such as very low electron effective mass, very high electron mobility and high saturation velocity. These are potentially of great interest for high speed device applications. Unfortunately it has proved difficult to overcome the drawbacks of these materials. A prior art three terminal active device which is a narrow bandgap semiconductor material heterostructure is described by T Ohashi et al in J Vac Sci Technol B4 622 (1986). It is a thin film depletion mode field effect transistor (FET) device, and consists of an InSb film on a GaAs substrate. However, the device of Ohashi et al unfortunately has poor performance, a high leakage current in particular. It has a dynamic range of only 7dB, and so its current in an ON state is only about twice (5.sup.1/2) that in an OFF state. This exemplifies the difficulty of exploiting the useful properties of narrow bandgap semiconductors.
European Patent Application No.8530405.1-2203 published as No. 0 167 305 corresponding to U.S. Pat. No. 5,016,073 discloses photodiodes having two or more terminals and formed as heterostructures of semiconductor materials. There is no disclosure of field effect transistors or bipolar transistors.
SUMMARY OF THE INVENTION
It is an object of the invention to provide an alternative form of semiconductor device.
The present invention provides a semiconductor device having first, second and third semiconducting regions connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, the device incorporating an extracting contact arranged to extract minority carriers from the second region, and the second region being of low doping and having a common interface with a fourth semiconducting region itself having a common interface with a fifth semiconducting region, and wherein the fourth region: excluding contact to exclude minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region, to minority carrier flow from the fifth region to the second region, to majority carrier flow from the second region to the fifth region, and formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region.
The expressions "extracting contact" and "excluding contact" are known in the art of semiconductor devices. The former relates to a junction which gathers minority carriers which diffuse to it, and the latter a junction which accepts majority carriers but does not supply minority carriers.
The invention provides the advantage that it makes possible the production of devices not produced in the prior art and the attainment of improved dynamic range: an enhancement mode field effect transistor embodiment of the invention formed from narrow bandgap semiconductor material has exhibited a dynamic range of 23dB. Such an FET device has not been made in the prior art. Moreover, this embodiment has a dynamic range which is a 16dB improvement over a prior art depletion mode device formed from narrow bandgap semiconductor material. In such embodiment of the invention, the first, second and third regions are source, gate and drain regions respectively, and the first and third regions are of like majority carrier type opposite to that of the second, fourth and fifth regions.
The invention may alternately be arranged as a depletion mode field effect transistor, in which case the first, second and third regions are source, gate and drain regions of like majority carrier type opposite to that of the fourth and fifth regions.
The second region may be a layer having first and second sides separat
REFERENCES:
patent: 4329625 (1982-05-01), Nishizawa et al.
patent: 4926228 (1990-05-01), Ashley et al.
patent: 5016073 (1991-05-01), Elliott et al.
Ashley et al, Ambient Temperature Diodes And Field-Effect Transistors in InSb/In, 1991, 3 pages.
Ashley Timothy
Elliott Charles T.
Whitehouse Colin R.
Limanek Robert P.
The Secretary of State for Defence in Her Britannic Majesty's Go
Williams Alexander Oscar
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