Semiconductor device with isolation between MOSFET and control c

Details Semiconductor device with isolation between MOSFET and control c Semiconductor device with isolation between MOSFET and control c

1988-02-10

1989-11-07

Mintel, William

357 42, 357 41, 357 48, H01L 2702

Patent

active

048795844

ABSTRACT:
A semiconductor device is provided which has a power insulated-gate MOS field effect transistor and a control semiconductor element formed in a common semiconductor substrate. A first area corresponding to a drain region of low resistance in the power MOS field effect transistor is different in resistivity than a second area corresponding to the control semiconductor element. The electrical characteristics of each element integrated in the devices is substantially equal to the same element in discrete form.

REFERENCES:
patent: 4046605 (1977-09-01), Nelson et al.
patent: 4376286 (1983-03-01), Lidow et al.
patent: 4546370 (1985-10-01), Curran
patent: 4609413 (1986-09-01), Boland
Fischetti, "Solid State", IEEE Spectrum, vol. 22, No. 1, Jan. 1985, pp. 60-64.
Sutor et al., "A Novel Isolation Structure for SMARTpower ICs," IEDM, pp. 214-217, Dec. 9, 1986.
Schultz et al., "Mixed MOS Devices Unite in a Switch Chip that Links Power with Smarts," Electronic Design, No. 4, pp. 191-196, Feb. 1985.
Patent Abstracts of Japan, vol. 8, No. 53, (E-231) [1490], 3/9/84 & JP-A-58 206 153, (Daini Seikosha K.K.), Jan. 12, 1983.
Fischetti, "In Smarter Design and Fabrication of ICs, Power and Logic are Mixed on the Same Chip and Circuits are Integrated Over an Entire Wafer," IEEE Spectrum, No. 1, pp. 60-64, Jan. 1985.

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