Semiconductor device with internal gettering region

Details Semiconductor device with internal gettering region Semiconductor device with internal gettering region

1982-12-10

1987-12-29

Larkins, William D.

357 64, 357 91, H01L 2704

Patent

active

047164514

ABSTRACT:
A semiconductor device includes a substrate of single crystalline silicon having the active regions of a semiconductor element, such as the source, drain, channel and gates, along one surface of the substrate, and a thin gettering region of a gettering material in the substrate. The gettering region is spaced from both surfaces of the substrate and is adjacent the active regions of the semiconductor element so as to getter contaminants in the substrate from the area of the substrate containing the semiconductor element.

REFERENCES:
patent: 3457632 (1969-07-01), Dolan et al.
patent: 3465209 (1969-09-01), Denning et al.
patent: 3556879 (1971-01-01), Mayer
patent: 3838440 (1974-09-01), McCaffrey et al.
patent: 3946425 (1976-03-01), Shoji et al.
patent: 4053335 (1977-10-01), Hu
patent: 4053925 (1977-10-01), Burr et al.
patent: 4424526 (1984-01-01), Dennard et al.
patent: 4435895 (1984-03-01), Parrillo et al.
patent: 4454523 (1984-06-01), Hill
Wordeman et al., "A Buried N-Grid for Protection Against Radiation Induced Charge Collection in Electrostatic Circuits", IEDM Tech. Digest, 1981, pp. 40-43.
"Gettering Processes for Defect Control," J. R. Monkowski, Solid State Technology, Jul. 1981, pp. 44-51.

Affiliated with

Also associated with

Rating

Semiconductor device with internal gettering region does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device with internal gettering region, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with internal gettering region will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-465943