Semiconductor device with input and/or output protective circuit

Details Semiconductor device with input and/or output protective circuit Semiconductor device with input and/or output protective circuit

1985-07-24

1988-03-22

Carroll, J.

357 41, 357 51, 357 59, H01L 2978, H01L 2702, H01L 2904

Patent

active

047332859

ABSTRACT:
An MOSIC is provided with an input and/or output protective circuit which includes a first semiconductor region formed in a semiconductor substrate with a PN junction and electrically coupled between an input or output terminal and a transistor to be protected and a second semiconductor region formed so as to surround the first region. The PN junction formed between the second region and the substrate is reverse-biased, whereby the second region absorbs carriers which are undesirably injected from the first region into the substrate in an electrical operation of the IC.

REFERENCES:
patent: 4044373 (1977-08-01), Nomiya et al.
patent: 4288829 (1981-09-01), Tango
patent: 4509067 (1985-04-01), McNami et al.
patent: 4616243 (1986-10-01), Minato et al.

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