Semiconductor device with improved wiring arrangement...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S734000, C257S773000, C257SE23143, C438S584000, C438S597000, C438S618000, C438S622000

Reexamination Certificate

active

10647373

ABSTRACT:
In a method of manufacturing a semiconductor device having a first wiring extending in a first direction and a second wiring connected to the first wiring through a connection and extending in a second direction orthogonal to the first direction, the second wiring having a surplus portion projecting from the connection in a direction opposite to the second direction, the first and second wirings are arranged such that a center of the connection is offset in the second direction from a center of the first wiring, and a projecting portion of the first wiring is disposed under the connection.

REFERENCES:
patent: 5014104 (1991-05-01), Ema
patent: 11-186433 (1999-07-01), None
patent: 2001-44196 (2001-02-01), None

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