Patent
1985-06-11
1988-02-23
Edlow, Martin H.
357 34, 357 46, 357 13, H01L 2934
Patent
active
047274085
ABSTRACT:
A semiconductor device comprises a semiconductor substrate, a vertical transistor formed in the substrate, highly doped regions selectively and concurrently formed within the base region and the collector region by ion-implantation method etc., respectively, the one highly doped region within the collector region being spaced from the base region, the other highly doped regions within the base region serving as base ohmic contact regions, a clamping diode consisting of a junction between the one highly doped region and the collector region and having breakdown voltage lower than a breakdown voltage across the collector and the emitter regions of the transistor, and a connection conductor formed on the substrate so as to electrically connect the one of the base ohmic contact regions with the one highly doped region for forming the junction of the clamping diode. The transistor device provided with the above-featured clamping diode structure can prevent undesired parasitic transistor effect from being produced. There is also provided a method of fabricating a high breakdown voltage vertical transistor device by which the above-mentioned clamping diode structure can be monolithically formed with a high efficiency.
REFERENCES:
patent: 4282555 (1981-08-01), Svedberg
patent: 4355322 (1982-10-01), Spellman
patent: 4626882 (1986-12-01), Cottrell
Edlow Martin H.
NEC Corporation
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