Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with field effect transistor
Reexamination Certificate
2000-07-03
2002-06-18
Christianson, Keith (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Combined with field effect transistor
Reexamination Certificate
active
06407413
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a Zener diode layer of the type having Zener diodes connected in series opposition between the collector and gate of an insulated gate bipolar transistor (referred to hereinafter as an IGBT).
2. Description of the Background Art
A prior art technique in which a Zener diode layer including alternately repeatedly arranged n and p layers is provided between the collector and gate of an IGBT is disclosed in, for example, Japanese Patent Application Laid-Open No. 9-186315 (1997).
FIG. 6A
shows a vertical cross-sectional structure of a semiconductor device which employs such a prior art technique.
In
FIG. 6A
, the reference numeral
1
designates an emitter electrode;
2
designates a gate electrode;
3
designates a collector electrode for a polysilicon diode layer;
4
designates a collector electrode connected to the collector electrode
3
;
5
designates a gate electrode layer connected to the gate electrode
2
;
6
designates a gate insulation film;
7
designates n source regions;
8
designates p wells;
9
designates guard rings;
10
designates an n type semiconductor layer;
11
designates an n
−
drift layer;
12
designates an n
+
buffer layer;
13
designates a collector layer;
14
designates an insulation film;
15
designates a field oxide film;
16
designates a polysilicon diode layer (a Zener diode layer);
17
designates an n
+
layer; and
20
designates a semiconductor substrate.
In the prior art technique, a structure for holding the breakdown voltage of the IGBT comprises (1) the polysilicon diode layer
16
including Zener diodes connected in series opposition one after another, and (2) the guard rings
9
.
In the prior art IGBT structure illustrated in
FIG. 6A
, adjacent pn junctions in the polysilicon diode layer
16
, the n
−
layer
11
including the guard rings
9
and the field oxide film
15
constitute a local n channel MOSFET. In this case, an n layer closer to the gate electrode
2
serves as a source layer of the MOSFET, an n layer closer to the collector electrode
3
serves as a drain layer thereof, and one of the guard rings
9
which underlies a centrally positioned p layer or part of the n
−
layer
11
around the one guard ring
9
serves as a gate electrode layer thereof. The presence of such a local n channel MOSFET on the n type semiconductor layer
10
results in a potential distribution in the n
−
layer
11
as schematically illustrated in
FIG. 6B
, for example, when a voltage of 500 V is applied between the gate
2
(
5
) and the collector
3
(
4
). It will be apparent from
FIG. 6B
that there is a large potential difference between adjacent ones of the guard rings
9
. Also, there is a relatively large potential difference in part of the n
−
layer
11
which lies inside the innermost (or leftmost in
FIG. 6A
) guard ring
9
and in part of the n
−
layer
11
which lies outside the outermost (or rightmost in
FIG. 6A
) guard ring
9
. Such potential differences act as an applied voltage VGS to be impressed between the gate and source of the n channel MOSFET. If the applied voltage VGS exceeds the inversion voltage Vth of the n channel MOSFET itself, the n channel MOSFET is inverted and placed into an operating state. This causes a current ID to flow through the npn portion in the polysilicon diode layer
16
, resulting in change in and deterioration of the breakdown voltage of the polysilicon diode layer
16
.
Such a problem is not peculiar to the polysilicon diode layer
16
having the structure illustrated in
FIG. 6A
, but arises in general when a guard ring is formed in a semiconductor substrate and a Zener diode layer having a plurality of pn junctions formed by alternately repeatedly arranging p and n layers between a pair of n layers on the opposite ends is formed on a field insulation film formed on the semiconductor substrate.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, a semiconductor device comprises: a semiconductor substrate comprising a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; at least one guard ring extending from a surface of the second semiconductor layer inwardly of the second semiconductor layer and provided in the form of a well of an impurity of the first conductivity type; a field insulation film formed on a first region included in the surface of the second semiconductor layer and containing a surface of the at least one guard ring; and a Zener diode layer formed on a second region included in a surface of the field insulation film and containing a portion positioned over the surface of the at least one guard ring, the Zener diode layer having a plurality of pn junctions formed by alternately repeatedly arranging p and n layers, wherein the pn junctions are formed only in a first portion of the Zener diode layer which is positioned over the surface of the at least one guard ring.
Preferably, according to a second aspect of the present invention, in the semiconductor device of the first aspect, the Zener diode layer includes a second portion adjacent to the first portion, and the pn junctions are not formed in the second portion.
According to a third aspect of the present invention, a semiconductor device comprises: a semiconductor substrate comprising a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; at least one guard ring extending from a surface of the second semiconductor layer inwardly of the second semiconductor layer and provided in the form of a well of an impurity of the first conductivity type; a field insulation film formed on a first region included in the surface of the second semiconductor layer and containing a surface of the at least one guard ring; and a Zener diode layer formed on a second region included in a surface of the field insulation film and containing a portion positioned over the surface of the at least one guard ring, the Zener diode layer having a plurality of pn junctions formed by alternately repeatedly arranging p and n layers, the Zener diode layer including a first portion positioned over the surface of the at least one guard ring, and a second portion adjacent to the first portion, wherein ones of the plurality of pn junctions are always formed in the second portion of the Zener diode layer, and wherein a MOSFET including adjacent ones of the plurality of pn junctions of the Zener diode layer, the second semiconductor layer including the at least one guard ring, and the field insulation film has an inversion voltage greater than an applied voltage to the MOSFET.
Preferably, according to a fourth aspect of the present invention, in the semiconductor device of the third aspect, the field insulation film has a thickness adjusted to make the inversion voltage greater than the applied voltage.
Preferably, according to a fifth aspect of the present invention, in the semiconductor device of the third aspect, each of the pn junctions constituting the MOSFET has a breakdown voltage adjusted to make the inversion voltage greater than the applied voltage.
In accordance with the first to fifth aspects of the present invention, when the Zener diode layer is provided between the collector and gate of an IGBT, the MOSFET including the second semiconductor layer including the at least one guard ring, adjacent ones of the plurality of pn junctions of the Zener diode layer, and the field insulation film does not operate. Therefore, the semiconductor device of the first to fifth aspects of the present invention effectively prevents a change in breakdown voltage of the Zener diode layer to provide improved reliability.
In particular, the third to fifth aspects of the present invention have the advantage of allowing the direct use of a conventional process for
Christianson Keith
Mitsubishi Denki & Kabushiki Kaisha
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