Semiconductor device with DLL circuit avoiding excessive power c

Details Semiconductor device with DLL circuit avoiding excessive power c Semiconductor device with DLL circuit avoiding excessive power c

1998-08-06

2000-05-23

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327158, 327299, H03L 706

Patent

active

060669691

ABSTRACT:
A semiconductor device includes a variable-delay circuit which delays an input-clock signal to generate a delay clock signal, a clock-control circuit which selects one of the input-clock signal and the delayed clock signal, an output circuit which outputs data in synchronism with a clock signal selected by the clock-control circuit, and a DLL circuit which adjusts a delay of the variable-delay circuit. The DLL circuit includes a delay-control circuit which adjusts the delay of the variable-delay circuit, and a clock-selection circuit which controls the clock-control circuit to select one of the input-clock signal and the delayed clock signal. The variable-delay circuit is controlled such that the delay is not increased when the input-clock signal is selected by the clock-selection circuit.

REFERENCES:
patent: 5822255 (1998-10-01), Uchida
patent: 5939913 (1999-08-01), Tomita
patent: 5955904 (1999-09-01), Kawasaki

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