Static information storage and retrieval – Addressing – Multiplexing
Patent
1988-07-15
1991-01-29
Bowler, Alyssa H.
Static information storage and retrieval
Addressing
Multiplexing
36523006, 36518901, 36523008, 36523003, G11C 800, G11C 11408, G11C 1606
Patent
active
049891855
ABSTRACT:
A memory area within a semiconductor integrated circuit device is accessible through an address changeover circuit. External control signals instruct the memory device as to the addressing mode desired. Address signals originating externally are provided directly to the IC's address decoder circuits, while addresses originating internal to the IC are first shifted one or two bits to modify the address by a power of 2, then provided to the address decoder circuits. In this way, data of bit length N may be written to a memory array of bit length M, where M>N.
REFERENCES:
patent: 4520464 (1985-05-01), Hallaver
patent: 4617653 (1986-10-01), Matsuzaki et al.
patent: 4833656 (1989-05-01), Tobita
"Hitachi Microcomputer Data Book, 8-bit Single Chip", issued by Hitachi, Ltd., Aug. 1984, pp. 823-861.
Fujimoto Michio
Matsuo Akinori
Nagayama Yoshiharu
Naito Kazuo
Wada Masashi
Bowler Alyssa H.
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
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