Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2001-07-11
2003-08-26
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S668000, C257S688000, C257S694000, C257S698000, C257S737000, C257S738000
Reexamination Certificate
active
06611049
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a leadless semiconductor device with a substrate chamfered for providing a connector. It also relates to a method of making such a semiconductor device.
2. Description of the Related Art
FIGS. 24 and 25
of the accompanying drawings show an example of conventional semiconductor device. The illustrated device includes a ceramic substrate
90
, a semiconductor chip
91
mounted on the substrate, and a resin package
92
enclosing the chip
91
. The chip
91
is provided with electrodes (not shown) which are directly or indirectly (i.e., via wires W) connected to pads
93
formed on the upper surface of the substrate
90
. On its lower surface, the substrate
90
is formed with terminals
94
connected to the pads
93
via connection holes
8
.
Referring to
FIG. 26
, the conventional device is fabricated in the following manner. First, a mother substrate
90
A of unbaked inorganic material is prepared. Then, pads
93
are formed on the upper surface of the mother substrate
90
A. The pads
93
include a number of pairs of one larger pad and two smaller pads. Though not shown in
FIG. 26
, a plurality of terminals (reference numeral
94
in
FIG. 25
) are formed on the lower surface of the mother substrate
90
A. These terminals are connected to the larger and smaller pads
93
by connection holes
8
(shown in broken lines). Each connection hole
8
is produced by stuffing tungsten powder into a through-hole formed in the mother substrate
90
A. Then, the mother substrate
90
A is baked at a temperature of about 1200° C. Thereafter, semiconductor chips
91
are mounted on the larger ones of the pads
93
in electrical conduction therewith, and enclosed with resin material. Finally, the mother substrate
90
A is cut along the predetermined lines N
1
, N
2
, thereby providing a plurality of semiconductors as shown in FIG.
24
.
While the illustrated prior art is functional, it also has the following drawbacks.
First, since the substrate
90
needs to be formed with several connection holes
8
, the downsizing of the substrate (hence the device as a whole) is rather difficult.
Second, the collective fabrication process (
FIG. 26
) of the prior art is time-consuming due to many connection holes
8
to be made in the mother substrate
90
A.
Third, the inorganic mother substrate
90
A tends to deform when it is subjected to baking. Disadvantageously, such deformation may cause positional deviation of the pads
93
or terminals
94
.
SUMMARY OF THE INVENTION
The present invention has been proposed under the circumstances described above. It is, therefore, an object of the present invention to provide advantageously smaller semiconductor devices and a time-saving method of making such devices.
According to a first aspect of the present invention, there is provided a semiconductor device including: an insulating substrate having an obverse surface, a reverse surface and side surfaces extending between the obverse and the reverse surfaces; a cutout formed in at least one of the side surfaces of the substrate; a conductive pad formed on the obverse surface of the substrate; an electrode formed on the reverse surface of the substrate; a semiconductor chip mounted on the substrate in electrical conduction with the pad; and a connector which connects the pad to the electrode, wherein the connector is arranged in the cutout.
Preferably, the connector may include a conductive layer attached to a wall surface of the cutout.
Preferably, the insulating substrate may be made of an organic material.
Preferably, the semiconductor device may further include a resin package enclosing the semiconductor chip.
Preferably, the package may be held out of contact with the connector by the conductive pad.
Preferably, the package may include a leg portion which reaches the cutout, thereby concealing the connector. The leg portion may include an end surface flush with the reverse surface of the substrate.
The device of the present invention may include a filler disposed at the cutout. The filler may be prepared separately from the package.
Preferably, the filler may include a flat surface parallel to either the obverse or reverse surface of the substrate, wherein the flat surface is held in contact with either the pad or electrode.
Preferably, the substrate may have a rectangular configuration, and the cutout is disposed at one of the four corners. Alternatively, the cutout may be disposed between two adjacent corners.
Preferably, the cutout may be one part of a quartered circular hole.
According to a second aspect of the present invention, there is provided a method of making a semiconductor device. The method may include the following steps. First, an insulating substrate having an obverse surface and a reverse surface is prepared. Then, an upper conductive pattern and a lower conductive pattern are formed on the obverse surface and the reverse surface, respectively. Then, a connection hole is formed in the substrate for making the electrical connection between the upper conductive pattern and the lower conductive pattern. Then, a semiconductor chip is mounted on the substrate. Then, a resin coating is formed on the substrate to enclose the semiconductor chip. Finally, the substrate is divided along cut lines which intersect the connection hole.
Preferably, the cut lines may cross each other at the center of the connection hole.
Preferably, the method may further include the step of providing closure on the obverse surface of the substrate, so that the closure prevents the resin coating from entering the connection hole. Alternatively, the resin coating may be allowed to enter the connection hole.
Preferably, the method of the present invention may include the step of filling the connection hole with a filler prior to the resin coating forming step. Preferably, the method of the present invention may include the step of providing a conductive layer held in contact with the filler.
Other features and advantages of the present invention will become apparent from the detailed description given below with reference to the accompanying drawings.
REFERENCES:
patent: 4819041 (1989-04-01), Redmond
patent: 5304844 (1994-04-01), Horiuchi et al.
patent: 5625222 (1997-04-01), Yoneda et al.
patent: 5834799 (1998-11-01), Rostoker et al.
patent: 6344609 (2002-02-01), Nakano
patent: 11-297752 (1999-10-01), None
Flynn Nathan J.
Merchant & Gould P.C.
Rohm & Co., Ltd.
Tran Tan
LandOfFree
Semiconductor device with chamfered substrate and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with chamfered substrate and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with chamfered substrate and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3075252