Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Patent
1993-12-06
2000-03-07
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
257649, 257760, 257763, H01L 2358
Patent
active
060344199
ABSTRACT:
A method of fabricating a tungsten contact in a semiconductor device comprises providing an oxide layer on a region of a silicon substrate; depositing a sealing dielectric layer over the oxide layer; and depositing an interlevel dielectric layer over the sealing layer. The interlevel dielectric layer, the sealing dielectric layer and the oxide layer are then etched through as far as the substrate thereby to form a contact hole and to expose the said region. A dopant is implanted into the said region whereby the implanted dopant is self-aligned to the contact hole. The substrate is thermally annealed. Tungsten is selectively deposited in the contact hole and an interconnect layer is deposited over the deposited tungsten contact. The invention also provides a semiconductor device which incorporates a tungsten contact and which can be fabricated by the method.
REFERENCES:
patent: 4028717 (1977-06-01), Joy et al.
patent: 4169270 (1979-09-01), Hayes
patent: 4271582 (1981-06-01), Shirai et al.
patent: 4385308 (1983-05-01), Uchida
patent: 4507853 (1985-04-01), McDavid
patent: 4520041 (1985-05-01), Aoyama et al.
patent: 4560582 (1985-12-01), Ichikawa
patent: 4592802 (1986-06-01), Deleonibus et al.
patent: 4710241 (1987-12-01), Komatsu
patent: 4764248 (1988-08-01), Bhattacherjee et al.
patent: 4782037 (1988-11-01), Tomozawa et al.
patent: 4878096 (1989-10-01), Shirai et al.
patent: 4964143 (1990-10-01), Haskell
patent: 4981550 (1991-01-01), Huttemann et al.
patent: 4990467 (1991-02-01), Lee et al.
patent: 5143861 (1992-09-01), Turner
C. Kaanta, et. al., "Submicron Wiring Technology with Tungston and Planarization", IEDM Conference Proceedings, IEEE, 9.3, pp. 209-212 (1987).
R. Blewer, et al., "Conditions for Tunnel Formation in LPCVD Tungston Films on Single Crystalsilicon", Materials Research Society, pp. 115-122 (1988).
E. Broadbent, et al. "Some Recent Observations on Tunnel Defect Formation During High Temperature Post-Deposition Anneal of CVD W on SI", Materials Research Society, pp. 111-113 (1988).
R. Blewer, et al., "Detrimental Effects of Residual Silicon Oxides on LPCVD Tungsten Depositions in Shallow Junction Devices", Materials Research Society, pp. 235-246 (1987).
J.T. Clemens, "NMOS Technology-A Review", The Electrochemical Society, Extended Abstracts, vol. 79-2, pp. 812-814 (1979).
V. Wells, "Tungston and Other Refractory Metals for VLSA Applications" 1985 Matt. Res. Soc., (Pittsburg, PA, USA).
V.V.S. Rana, et al. "Selective Tungston Plugs on Silicon for Advanced CMOS Devices" Technical Digest of the International Electron Devices Meeting, Dec. 6, 1987, IEEE, Washington DC, pp. 862-864.
S. Sachdev et al. Blanket Tungston Applications in VLSI Processing, 1985 Material Research Society, pp. 475-482.
S.M. Sze, "Semiconductor Devices Physics and Technology", John Wiley & Sons, New York (1985) pp. 113, 360-361.
Nicholls Howard Charles
Norrington Michael John
Thompson Michael Kevin
Carroll J.
Inmos Limited
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