Semiconductor device with a short-lifetime region and...

Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant – Deep level dopant

Reexamination Certificate

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C257S612000, C438S514000

Reexamination Certificate

active

11080367

ABSTRACT:
A semiconductor device has an n−-semiconductor layer and p+-diffusion regions each having a depth of 14 to 20 μm (design value) selectively formed in the n−semiconductor layer. With the entire surface of the chip irradiated with light ions, such as He ions, a lifetime killer is introduced from a position d2shallower than a position d1of a p-n junction surface, formed from the n−-semiconductor layer and the p+-diffusion regions, to a position d3deeper than the position d1to form a short-lifetime region over the entire chip. The irradiation is carried out so that the light ion irradiation half width is not more than the depth of the p+-diffusion regions and a position of a peak of the light ions becomes deeper than the light ion irradiation half width and within the range between 80% and 120% of the depth of the p+-diffusion regions. Thus, in a semiconductor device such as a converter diode, a capability for a high decay rate of a reverse recovery current di/dt can be brought sufficiently high to such an extent that the device can withstand a lightening surge with a low forward voltage VF being kept low.

REFERENCES:
patent: 6603189 (2003-08-01), Takahashi
patent: 6707131 (2004-03-01), Kitamura et al.
patent: 10-116998 (1998-05-01), None
patent: 10-200132 (1998-07-01), None
patent: 2001-135831 (2001-05-01), None
patent: 2003-249662 (2003-09-01), None
patent: 2004-6664 (2004-01-01), None
Tomomatsu, Y. et al., “An analysis and improvement of destruction immunity during reverse recovery for high voltage planar diodes under dirr/dt condition,” IEEE, 1996, . . . (continued) ISBN: 0-7803-3106-0/96, pp. 353-356.

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