Semiconductor device with a plurality of power supply systems

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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Reexamination Certificate

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07869174

ABSTRACT:
Disclosed is a semiconductor integrated circuit device that includes an output circuit with power thereof supplied from one power supply system, an input circuit with an input terminal thereof connected to an output terminal of the output circuit through a signal line and with power thereof supplied from other power supply system different from the one power supply system, and a circuit that restrains a current flowing from the output circuit into the signal line when an ESD stress is applied from the output circuit to a signal transmitting/receiving portion of the input circuit.

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patent: 2006/0114047 (2006-06-01), Irino
patent: 2008/0062597 (2008-03-01), Chen et al.
patent: 9-172146 (1997-06-01), None
patent: 2006-156563 (2006-06-01), None

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