Patent
1991-07-31
1992-05-05
Larkins, William D.
357 233, H01L 2978
Patent
active
051112582
ABSTRACT:
A semiconductor device includes a first region, a well-shaped second region formed in the first region and a third region formed in the well-shaped second region. Both the first region and the third region have a first conductive type, the well-shaped second region has a second conductive type. A gate electrode is formed on a channel of the well-shaped second region. The channel is sandwiched between the first region and the third region. According to the present invention, the depth of the third region is very deep in a portion near the channel and is very shallow in a portion far from the channel. A resistance of the well-shaped second region near a portion of the third region far from the channel is lower than near the portion of the third region near the channel.
REFERENCES:
patent: 4433468 (1984-02-01), Kawamata
Sasaki Mutsumi
Suzuki Shuichi
Takahashi Koji
Fujitsu Limited
Larkins William D.
Meier Stephen D.
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