Patent
1986-09-11
1991-07-09
James, Andrew J.
357 52, H01L 2940
Patent
active
050310216
ABSTRACT:
There is disclosed a power transistor comprising a semiconductor substrate having a PN junction exposed on a major surface of the semiconductor substrate, and a semiinsulative polysilicon film formed on the major surface, the polysilicon film covering the PN junction, the polysilicon film containing at least one of carbon, oxygen, and nitrogen, and the polysilicon film having a thickness of about 3000 .ANG..
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patent: 4344985 (1982-08-01), Goodman et al.
patent: 4420765 (1983-12-01), Tarng
"Semi-Insulating Polycrystalline-Silicon (SIPOS) Films Applied to MOS Integrated Circuits", Proceedings of the 7th Conf. on Solid State Devices, Tokyo 1975, Supplement to Japanese Journal of Applied Physics, vol. 15, 1976, pp. 41-48.
"Highly Reliable High-Voltage Transistors by Use of the SIPOS Process," IEEE Transactions on Electron Devices, vol. ED-23, No. 8, Aug., 1976, pp. 826-830.
Matsushita et al., "Highly Reliable High-Voltage Transistors by Use of the SIPOS Process," IEEE Transactions on Electron Devices, vol. ED-23, No. 8, pp. 826-830, Aug. 1976.
Mimura et al., "High-Voltage Planar Structure Using SiO2-SIPOS-SiO2 Film," IEEE Electron Device Letters, vol. EDL-6, No. 4, pp. 189-191, Apr. 1984.
Akiyama Tatsuo
Baba Yoshiro
Koshino Yutaka
Tsuru Kazuo
Crane Sara W.
James Andrew J.
Kabushiki Kaisha Toshiba
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