Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2007-01-09
2007-01-09
Chambliss, Alonzo (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S758000, C257S797000, C438S462000
Reexamination Certificate
active
10731148
ABSTRACT:
A semiconductor device includes an alignment mark which is arranged adjacent to each corner of a semiconductor chip, and a plug which contacts the alignment mark. The alignment mark is formed by part of the uppermost interconnection layer in a multilevel interconnection which is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers. The plug is buried in a contact hole formed in the low-permittivity insulating layer below the alignment mark, and contacts the alignment mark.
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Chambliss Alonzo
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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