Semiconductor device which employs an interlayer insulating...

Details Semiconductor device which employs an interlayer insulating... Semiconductor device which employs an interlayer insulating...

2007-04-10

2007-04-10

Toledo, Fernando L. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S759000, C257S760000, C438S612000

Reexamination Certificate

active

10933423

ABSTRACT:
A semiconductor device includes: multiple kinds of interlayer insulating films formed on a semiconductor substrate and having different elastic moduli, respectively; a metal pad arranged on said multiple kinds of interlayer insulating films; the interlayer insulating film of a low elastic modulus having the lowest elastic modulus and having an opening located under the metal pad, the interlayer insulating film of a not-low elastic modulus having the elastic modulus larger than the elastic modulus of the interlayer insulating film of the low elastic modulus, being layered in contact with the interlayer insulating film of the low elastic modulus, and continuously extending over the opening and a region surrounding the opening and a metal interconnection layer arranged under the metal pad, filling the opening in the interlayer insulating film of the low elastic modulus, and being in contact with the interlayer insulating film of the not-low elastic modulus.

REFERENCES:
patent: 5149674 (1992-09-01), Freeman, Jr. et al.
patent: 5736791 (1998-04-01), Fujiki et al.
patent: 5739587 (1998-04-01), Sato
patent: 6486557 (2002-11-01), Davis et al.
patent: 6492200 (2002-12-01), Park et al.
patent: 2004/0058520 (2004-03-01), Burrell et al.
patent: 2005/0253271 (2005-11-01), Nakata et al.
patent: 1311530 (2001-09-01), None
patent: 1399334 (2003-02-01), None
patent: 5-343466 (1993-12-01), None
patent: 11-340319 (1999-12-01), None
patent: 2000-183104 (2000-06-01), None
patent: 2000-340569 (2000-12-01), None
patent: 2001-267323 (2001-09-01), None
patent: 2001-308100 (2001-11-01), None
Inohara, M. et al. “Hlgh Performance Copper and Low-k Interconnect Technology Fully Compatible to 90 nm-node SOC application (CMOS4)”, Technical Digest of 2002 IEDM, pp. 77-80.

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