Semiconductor device wafer with interlayer insulating film cover

Details Semiconductor device wafer with interlayer insulating film cover Semiconductor device wafer with interlayer insulating film cover

1990-04-12

1992-08-04

Hille, Rolf

Fishing, trapping, and vermin destroying

357 47, 357 49, 357 52, 357 54, 437226, 437234, H01C 2702, H01C 2712, H01C 2934, H01C 21302

Patent

active

051363542

ABSTRACT:
A semiconductor device wafer in which the interlayer insulating film between wirings and the passivation film formed during the manufacturing process are left on the entire surface of the scribe line area during dicing. The interlayer insulating film between wirings and the passivation film formed during the manufacturing process may be left on most of the scribe line area, in which case a slit groove is provided along the periphery of a chip and the passivation film is removed at the location of the slit groove. Alternatively, the passivation film formed during the manufacturing process may be left on a part of the scribe line area where a film structure is provided. In this case, a slit groove is provided along the periphery of a chip and the passivation film is removed at the location of the slit groove in the same way as mentioned above on the part of the scribe line in which there is a film structure such as an alignment mark, while most of the passivation film on the scribe lines is removed in the area in which there is no film structure.

REFERENCES:
patent: 3852876 (1974-12-01), Sheldon et al.
patent: 4080621 (1978-03-01), Funakawa et al.
patent: 4259682 (1981-03-01), Gamo
patent: 4364078 (1982-12-01), Smith et al.
patent: 4835592 (1989-05-01), Zommer
patent: 4925808 (1990-05-01), Richardson
Wolf et al., "Silicon Processing for the ULSI Era", vol. 1, Lattice Press, Sunset Beach, Calif., 1986, pp. 182-183.

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