Semiconductor device using SCL circuit

Details Semiconductor device using SCL circuit Semiconductor device using SCL circuit

2005-01-11

2005-01-11

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S230010

Reexamination Certificate

active

06842394

ABSTRACT:
A high-speed, reduced power consumption address decoder circuit, wherein a decoder control signal Φ2 is rendered unnecessary between an address buffer control signalΦ1 and the decoder control signal Φ2, thereby implementing speed-up in operation of a decoder circuit. Improved speed and reduced power consumption are attained by a configuration wherein a buffer is integrated with a decoder, so that an output current path of transistors making up the address buffer, and that of transistors making up the decoder are connected with each other in series, thereby forming an output current path of decoder output. With the invention, speed-up in operation, lower power consumption, and higher cycle, of decoder circuits, can be achieved. Further, in the case of using the decoder circuits in a semiconductor memory, it is possible to achieve shortening of access time, lower power consumption, and higher cycle with reference to the semiconductor memory.

REFERENCES:
patent: 4349895 (1982-09-01), Isogai
patent: 6243318 (2001-06-01), Yoshihara
patent: 6333645 (2001-12-01), Kanetani et al.
patent: 6337581 (2002-01-01), Kanetani et al.
patent: 10-150358 (1998-06-01), None

Affiliated with

Also associated with

Rating

Semiconductor device using SCL circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device using SCL circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device using SCL circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3437056