Semiconductor device transporting and handling apparatus

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Patent

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Details

3241581, 36447802, 36447811, 414935, 209573, G01R 3126, B65G 4907, B07C 5344

Patent

active

060781882

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to a semiconductor device transporting and handling or processing apparatus (commonly referred to as handler) which is mounted to a semiconductor device testing apparatus (commonly referred to as IC tester) for testing a semiconductor device such as a semiconductor integrated circuit (hereinafter referred to as IC) which is typical of the semiconductor devices.
2. Background of the Related Art
Many of semiconductor device testing apparatus (hereinafter referred to as IC tester) for measuring or determining the electrical characteristics of semiconductor devices by applying a test signal of a predetermined pattern to the devices to be tested have a semiconductor device transporting and handling or processing apparatus (hereinafter referred to as handler) integrally connected thereto. The handler is adapted for transporting semiconductor devices to be tested to a test or testing section where the devices are brought into electrical contact with a tester head of the IC tester for testing, and upon completion of the test in the test section, carrying the tested devices out of the test section, and sorting out the tested devices on the basis of the test results. For clarity of the explanation, the following description will be discussed with reference to ICs which are a typical example of semiconductor devices, but it is needless to say that the present invention can be also applied to semiconductor devices other than ICs.
At first, the outline of the construction and operation of an example of the prior art handler called "horizontal transporting system" will be described with reference to FIGS. 5 and 6. As is shown in the form of a flow chart in FIG. 5, the illustrated handler 30 comprises a loader section 3 where ICs 33 to be tested which a user has beforehand loaded on a customer tray (general-purpose tray) 31 are transferred and reloaded onto a test tray 32 capable of withstanding high/low temperatures, a constant temperature or thermostatic chamber 34 including a test section 2 for receiving and testing the ICs from the loader section 3, and an unloader section 4 where the tested ICs 33 which have been carried on the test tray 32 out of the constant temperature chamber 34 subsequently to undergoing a test in the test section 2 are transferred from the test tray 32 to the customer tray 31 to be reloaded on the latter (generally, the tested ICs are often sorted out by categories based on the data of the test results and transferred onto the corresponding customer trays.) Depending upon the type of ICs to be tested (in the case of the surface mount type ICs or the like each packaged in a dual-in-line flat package, for example), each IC may be loaded on an IC carrier, and then the IC carrier loaded with the IC may be placed on a customer tray.
The test tray 32 is moved in a circulating manner from and back to the loader section 3 sequentially through the constant temperature chamber 34 and the unloader section 4. More specifically, the test tray 32 loaded with ICs 33 to be tested is transported from the loader section 3 to a heating/cooling chamber 35 called soak chamber within the constant temperature chamber 34 where the ICs 33 placed on the tray 32 are heated or cooled to a predetermined constant temperature. Generally, the soak chamber 35 is adapted to store a plurality of (say, nine) test trays 14 stacked one on another such that a test tray 32 newly received from the loader section 3 is stored at the top of the stack while the lowermost test tray is delivered to the test section 2. The ICs 33 to be tested are heated or cooled to a predetermined constant temperature while the test tray 32 is moved from the top to the bottom of the stack within the soak chamber 35. The heated or cooled ICs 33 together with the test tray 32 are then transported while maintained at the constant temperature from the soak chamber 35 to the test section 2 where the ICs to be tested are brought into electrical contact with IC sockets (not shown

REFERENCES:
patent: 3584741 (1971-06-01), Schirmer
patent: 3664499 (1972-05-01), Sahakian
patent: 4755746 (1988-07-01), Mallory et al.
patent: 4911629 (1990-03-01), Fujita
patent: 5307011 (1994-04-01), Tani
patent: 5313156 (1994-05-01), Klug et al.
patent: 5650732 (1997-07-01), Sakai
patent: 5812409 (1998-09-01), Kanno et al.

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