Semiconductor device that includes a silicide region that is...

Details Semiconductor device that includes a silicide region that is... Semiconductor device that includes a silicide region that is...

2007-05-29

2007-05-29

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Washed emitter

Reexamination Certificate

active

11033279

ABSTRACT:
There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.

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Office Action (Application No. 08-307443) with partial translation, Oct. 5, 2004, 7 pages.

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