Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-06-16
2008-03-18
Mai, Son L. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S189090, C365S226000
Reexamination Certificate
active
07345919
ABSTRACT:
A semiconductor device includes a memory cell array including a plurality of cores, each of said cores including one block or a plurality of blocks. The semiconductor device further includes a first power supply line which is provided commonly for said plurality of cores and which provides a data reading power supply potential; a second power supply line which is provided commonly for said plurality of cores and which provides a data writing or erasing power supply potential; and a power supply line switching circuit which is provided for each of said plurality of cores and which selectively connects a corresponding one of said plurality of cores to said first power supply line or said second power supply line in accordance with whether said corresponding one of said plurality of cores is in a data read mode or a data write or erase mode.
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Commonly assigned U.S. Appl. Nos. 09/478,057, filed Jan. 5, 2000 and 09/523,729, filed Mar. 18, 1999.
Hara Tokumasa
Hiramatsu Tatsuya
Honda Yasuhiko
Ikeda Takafumi
Kato Hideo
Banner & Witcoff Ltd
Kabushiki Kaisha Toshiba
Mai Son L.
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