Semiconductor device tester and its method

Details Semiconductor device tester and its method Semiconductor device tester and its method

2005-07-26

2005-07-26

Assouad, Patrick (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

C702S125000, C714S744000, C324S763010

Reexamination Certificate

active

06922650

ABSTRACT:
Data on a period longer than the test cycle period concerned in a high-speed pattern test is preset in a period data storage41, then a flag1is set in a cycle stretch setting part16E of a pattern-generation memory16at an address position where to execute cycle stretch, then a high-speed pattern test signal is applied, and when the flag1is read out by an address from an address counter14, a switching part42is controlled to switch data read out of a test cycle memory34to data set in a setting register44for application to a test cycle generator36, thereby lengthening the test cycle period.

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