Semiconductor device test system

Details Semiconductor device test system Semiconductor device test system

1997-07-28

1999-08-17

Gordon, Paul P.

Boots, shoes, and leggings

36447808, 36447816, 36446828, 324765, G06F 1700, G01R 3126

Patent

active

059403039

ABSTRACT:
A semiconductor device test system includes a first warehouse, an insertion and extraction unit, a second warehouse, a test burn-in unit, and a scheduler. The scheduler sets a test schedule so that the test burn-in unit tests the semiconductor devices according to the type of semiconductor devices, based on product data transmitted from the first and second warehouses. The scheduler issues an instruction to transfer a desired burn-in board from the second warehouse to the insertion and extraction unit based on the insertion and extraction schedule. The scheduler issues an instruction to transfer the desired burn-in board from the insertion and extraction unit to the second warehouse based on the insertion and extraction schedule. A high throughput test system is thus provided that concurrently carries out the insertion and extraction of semiconductor devices with respect to burn-in boards.

REFERENCES:
patent: 4817273 (1989-04-01), Lape et al.
patent: 5093984 (1992-03-01), Lape
patent: 5148100 (1992-09-01), Sekiba
patent: 5509193 (1996-04-01), Nuxoll
patent: 5650732 (1997-07-01), Sakai
"Hardware Specifications for AF-8630 Test Burn-in Test System" 7th ed., Ando Electric Co., Ltd. (Dec. 20, 1991).

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