Semiconductor device test apparatus

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S760020, C324S1540PB

Reexamination Certificate

active

06407563

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device test apparatus, and more particularly to a coupling device thereof.
IN THE PRIOR ART
IC socket which matches the shape of the device to be measured, is employed for testing a newly developed device. An IC socket, which comes into electrical contact with the device to be measured, fulfills a function as a means for electrical signal communication between a peripheral device and the device to be measured.
Now, the IC socket, the device to be measured and the connection between the IC socket and the device to be measured are explained in reference to
FIGS. 29
,
30
and
31
.
FIG. 29
is a sectional view of a device to be measured
1
and an IC socket
3
mounted at a circuit board
5
, illustrating the connections among them. The IC socket
3
is provided with a plurality of contacts
3
a
, and is soldered onto the circuit board
5
at the contacts
3
a
. The device to be measured
1
, which is pressed down by a holding member
7
, is electrically connected with the contacts
3
a
of the IC socket
3
.
FIG. 30
is a perspective of the device to be measured
1
, showing its surface on which electrodes are formed. The device to be measured
1
is a CSP (chip-size package) device achieved through chip size packaging. The device to be measured
1
is provided with a plurality of electrodes
1
a
through which electrical signals are input and output and power is supplied. The individual contacts
3
a
provided at the IC socket
3
are positioned so that they come in contact with the corresponding electrodes
1
a.
FIG. 31
is a plan view of the circuit board
5
with the devices to be measured
1
and the IC sockets
3
mounted, viewed from above. The circuit board
5
is allowed to engage in electrical signal communication with peripheral devices such as an IC tester and a burn-in apparatus (not shown) via connection terminals
5
a
and
5
b.
With the devices to be measured
1
, the IC socket
3
and the circuit board
5
configured as described above, electrical signals input to the circuit board
5
from peripheral devices via the connection terminals
5
a
and
5
b
and a source voltage travel through the contacts
3
a
of the IC socket
3
to be supplied to the devices to be measured
1
through the electrodes
1
a
. In addition, electrical signals output by the devices to be measured
1
travel through the reverse route to reach the peripheral devices. Such electrical connection enable functional tests on the devices
1
to be measured.
Apart from functional tests achieved by employing IC sockets as described above, a functional test on a wafer-level device, in particular, is implemented by adopting a method whereby probes are placed in contact with wafer pads constituting signal input/output electrodes and source electrodes of the device.
Since the wafer and the probes are placed in contact a great number of times in such functional tests employing probes, the contact durability of the probe is a critical concern. If the contact durability of the probes is poor, the cost of the functional test is bound to increase, raising the price of the device itself. For this reason, probes are normally constituted of materials with a high degree of hardness such as tungsten and beryllium copper.
FIG. 32
illustrates a probe card
13
provided with probes
11
. At the probe card
13
, a specific circuit that corresponds to the device to be measured is printed, and electrical signal communication with peripheral devices (not shown) is enabled via connection terminals
13
a
and
13
b.
The positional relationship between a probe card
13
and the wafer
15
which constitutes the device to be measured is illustrated in FIG.
33
. Electrical signals provided by a peripheral device are input to the probe card
13
via the connection terminals
13
a
and
13
b
, travel through the circuit formed at the probe card
13
to reach the probe
11
. Then, the electrical signals are applied to the pads formed at the wafer
15
from the probe
11
. In addition, electrical signals output by the wafer
15
travel through the reverse route to reach a peripheral device. The structure described above enables a functional test on the wafer
15
.
However, the following problems are yet to be addressed in functional tests conducted by utilizing IC sockets and functional tests conducted by utilizing probes.
The smallest pitch for contacts at an IC socket is currently 0.65 mm. At the same time, the package size has been reduced in recent years, with the CSP being a typical example, and as a result, the electrode pitch at the device has been switched from 1.27 mm to 0.8 mm or 0.5 mm. This reduction in the electrode pitch at the device necessitates a reduction in the pitch of the contacts at the IC socket.
However, in order to reduce the contact pitch at an IC socket to 0.65 mm or smaller, the IC socket machining accuracy must be improved. This will inevitably raise the production cost of the IC socket, and may result in a large increase in the device price.
In addition, the body size of IC sockets imposes a restriction upon the number of IC sockets that can be mounted at a circuit board. Such restriction on the number of IC sockets that can be mounted at the circuit board ultimately restricts the number of devices that can be tested in a single functional test. Thus, functional tests conducted on devices utilizing IC sockets in the prior art are not always efficient.
In order to achieve a higher degree of efficiency in functional tests conducted by employing probes, it is desirable to increase the number of probes mounted at a probe card so that many devices can be tested at once. However, probes are secured to the probe card using a resin or the like in the prior art, which requires a large space for securing them. Thus, it is difficult to increase the number of probes without increasing the probe card size.
Furthermore, as higher integration of devices becomes more common, the pitch of the device pads with which probes come in contact is becoming narrower. This reduction in the pad pitch necessitates a reduction in the pitch of probes mounted at the probe card. However, it is difficult to reduce the probe pitch in the structure adopted in the prior art.
SUMMARY OF THE INVENTION
An object of the present invention, which has been met by addressing the problems of the prior art discussed above, is to provide a semiconductor device test apparatus (a coupling device thereof) that can be employed to test semiconductor devices with electrodes provided at a fine pitch and also achieves a high degree of durability. Another object of the present invention is to provide a semiconductor device test apparatus that is capable of batch testing a great number of semiconductor devices.
In order to achieve the objects described above, according to the present invention, a semiconductor device test apparatus is provided that is capable of testing one or a plurality of semiconductor devices each provided with a plurality of electrodes. The semiconductor device test apparatus according to the present invention is characterized in that it is provided with a circuit board having a circuit that corresponds to the semiconductor device and a plurality of electrodes that correspond to individual electrodes at the semiconductor device and a connection plate that is provided with a plurality of conductive portions that electrically connect the individual electrodes at the semiconductor device and the individual electrodes at the circuit board on a one-to-one basis. This structure allows the semiconductor device to be electrically connected to the circuit board via the connection plate. The semiconductor device can be driven by inputting various types of electrical signals to the circuit board from peripheral devices, and various types of electrical signals output by the semiconductor device are communicated to the peripheral devices. In addition, by providing the connection plate having a plurality of conductive portions provided to electrically connect t

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