Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Patent
1999-05-03
2000-10-03
Picardat, Kevin M.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
438123, 257666, 257673, H01L 2144, H01L 23495
Patent
active
06127206&
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a substrate for a semiconductor device, a lead frame, a semiconductor device and a method of making the same, a circuit board, and an electronic apparatus.
DESCRIPTION OF BACKGROUND ART
Known is a method of fabricating a semiconductor device by connecting the electrodes of a semiconductor chip to the leads connected to the external terminals by wire bonding, this method is applied regardless of package form. Also known is a method of fabricating a semiconductor device by use of a lead frame. The following outlines this later method.
As is well known, a semiconductor chip formed with an integrated circuit is mounted on the island of a lead frame with an adhesive, for example. Plural electrode pads on the semiconductor chip are connected to corresponding leads with metal fine wires (or wire). Then, the semiconductor chip and the surroundings thereof are integrally molded for resin encapsulation with a resin such as a synthetic resin. The leads of the outer side of resultant resin-molded package are ultimately separated from the lead frame, and appropriately bent and cut, if necessary. Thus, a semiconductor device can be fabricated.
To attach the metal line wires bonds between the plural electrode pads on the semiconductor chip mounted on the island and the surface of the corresponding leads, a metal line wiring apparatus known as a wire bonder must be programmed to recognize the electrode pads and the corresponding leads. To do so, the edge of each lead must be captured as an optical image to store the contour of the lead in the memory of the wire bonder.
In recognizing the leads of a semiconductor device lead frame, the wire bonder makes use of the external view of each lead as a reference. Therefore, a lead having a defect such as torsion, luster, or rough surface causes a wide variation in the recognition accuracy of the wire bonder.
Recently, the increasing number of pins on one semiconductor device inevitably increases the number of leads thereof and the miniaturization of semiconductor devices accordingly decreases the width of each lead and the interval between leads (or the lead pitch). Currently, a typical lead width is as small as 0.07 mm and a typical lead pitch is 0.16 mm. Consequently, as the lead width and the lead pitch narrow, it is more difficult, when connecting the plural electrode pads arranged on a semiconductor chip to the corresponding leads with metal line wires, for the metal line wire to be connected to the lead at the center along the width of the lead.
Such being the case, attaching the metal line wire to the lead off-center of the width or, detachment of the metal line wire from the lead causes a connection failure. Therefore, no matter how small the lead gets, the center of each lead is must be accurately recognized. Conventionally, however, if the lead has inadequate flatness or distortion, the center of each lead cannot be optically recognized with a high degree of precision.
It is therefore an object of the present invention to provide a semiconductor substrate, a lead frame, a semiconductor device, a method of fabricating the same, a circuit board, and an electronic apparatus that facilitate the optical recognition to prevent poor wire bonding.
DISCLOSURE OF INVENTION
comprises at least a lead connected to an electrode of a semiconductor element with a wire to form a part of the semiconductor device, the lead having a center index portion at a center along its width in a bonding area of the wire.
This novel arrangement allows reliable optical detection of the center along the width of the lead, thereby shortening the time for detecting the center and, at the same time, enhancing wire bonding positioning accuracy with ease. Consequently, the novel arrangement prevents poor wire bonding.
Bonding a wire to the dent or the groove extends the bonding area between the wire and the lead, thereby providing a significantly high bonding strength. In addition, the novel arrangement provides a high-contrast shade on the lead surfac
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Picardat Kevin M.
Seiko Epson Corporation
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