Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2000-12-15
2002-10-22
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S687000, C257S688000, C257S689000, C257S700000, C257S703000, C257S723000, C257S729000, C257S730000, C257S787000
Reexamination Certificate
active
06469382
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device substrate, and a method of manufacturing the substrate and a semiconductor device.
2. Description of the Related Art
Semiconductor devices are increasingly reduced in size and weight. With a smaller thickness of portable devices in recent years, a smaller thickness is also required in semiconductor devices used therefor.
As a method of manufacturing a thin semiconductor device, a method as illustrated in
FIG. 2A
to
FIG. 2C
is conventionally employed using a substrate shown in FIG.
1
A and FIG.
1
B.
FIG. 1A
is a top view of the substrate, and FIG.
1
B and
FIG. 2A
to
FIG. 2C
are section views of the substrate taken along the C-C′ line in
FIG. 1A
for illustrating manufacturing steps.
As shown in
FIG. 1A
, substrate
1
is formed of alumina ceramic and is provided with a plurality of externally guiding electrodes
2
at regular intervals. As shown in
FIG. 1B
, each of externally guiding electrodes
2
is configured to comprise element connecting electrode
2
a
, via hole
2
b
, and external device connecting electrode
2
c
such that element connecting electrode
2
a
on the surface is electrically connected to external device connecting electrode
2
c
on the back surface thorough via hole
2
b.
As shown in
FIG. 2A
to
FIG. 2C
, each semiconductor device is formed by holding substrate
1
as shown in
FIG. 2A
to dispose and fix semiconductor element
3
onto element connecting electrode
2
a
with a conductive paste, an AuSn alloy, an AuSi alloy or the like, electrically connecting an electrode of fixed semiconductor element
3
to element connecting electrode
2
a
with wire
4
formed of gold, aluminum or the like, applying and curing liquid resin
7
with printing or application through potting (FIG.
2
B), bonding the surface of the substrate on which resin
7
is cured to a tape for dicing, and cutting the substrate at A-A′ planes by a dicing machine (FIG.
2
C).
In the aforementioned method of manufacturing a semiconductor device, however, a reduced viscosity of resin
7
due to an increased temperature after the application thereof causes resin
7
to easily flow in the outer portions thereof, causing resin
7
to be spread without maintaining the shape at the application. As a result, the method has disadvantages that resin
7
applied at a small thickness leads to variations in thickness of applied resin
7
after the cure due to the flow of resin
7
, and that semiconductor element
3
and wire
4
tend to be exposed in the portion of resin
7
with a smaller thickness.
In addition, since the alumina ceramic is used for the material of substrate
1
, a smaller thickness of substrate
1
causes the concentration of mechanical stress and thermal stress in the outer portions of a substrate with many defects, easily producing cracking in the substrate.
Furthermore, since the linear expansion coefficient of a resin typically ranges from 1 to 4×10
−5
(/° C.) which is greatly different from that of an alumina ceramic substrate at 0.6×10
−5
(/° C.), cooling of resin
7
after the cure produces stress caused by the difference in the linear expansion coefficient between resin
7
and substrate
1
to readily generate a warp in the substrate. Such a warp of the substrate makes it difficult to entirely bond the adhesive tape for use in bonding to the resin applied surface of the substrate when the substrate is cut into individual semiconductor devices. Thus, disadvantages are present in which the substrate cannot be cut finely and chips are scattered from the cut product or the chips may damage and break the cutting teeth.
Prior Art
FIG. 3
illustrates a manufacturing method of another prior art presented in Japanese Patent Laid-open Publication No.10-294498.
The manufacturing method illustrated in
FIG. 3
manufactures a semiconductor device by disposing and fixing semiconductor element
3
onto substrate
1
, connecting an electrode of semiconductor element
3
to electrode
10
on substrate
1
with wire
4
, attaching frame
9
formed of a fluororesin around the disposed electrodes, and applying and curing resin
7
.
In such a prior art, the fluororesin is used as the material of the frame. However, its linear expansion coefficient ranges from 4 to 10×10
−5
(/° C.) which is greatly different from that for an alumina ceramic substrate at 0.6×10
−5
(/° C.), and stress is applied due to the difference in the linear expansion coefficient between frame
9
formed of the fluororesin and substrate
1
.
Thus, the prior art has a disadvantage that a smaller thickness of the substrate for achieving a smaller size and a lighter weight causes a significant warp in substrate
1
due to changes in temperature after the cure of the resin, thereby impairing the adhesion between the resin surface of substrate
1
and the adhesive tape when the substrate is cut into semiconductor devices.
In addition, when frame
9
formed of the fluororesin is reduced in thickness to suppress the warp of the substrate, the resin near frame
9
formed of the fluororesin flows to readily produce variations in thickness of the resin.
FIG. 4
illustrates a semiconductor device and a manufacturing method thereof of another prior art presented in Japanese Patent Laid-open Publication No.10-150127.
The manufacturing method illustrated in
FIG. 4
manufactures a semiconductor device by using substrate
1
including groove
11
formed therein, disposing semiconductor element
3
on substrate
1
, connecting an electrode of disposed semiconductor element
3
to electrode
10
on substrate
1
with wire
4
, and then applying and curing resin
7
.
In such a prior art, groove
11
formed to stop the flow of the resin causes a smaller thickness of the substrate near groove
11
to reduce the strength of the substrate near groove
11
, making it easy to produce cracking in the substrate.
An additional disadvantage is that since resin
7
near groove
11
flows toward groove
11
, a difference in height readily occurs after the cure between the resin near groove
11
and the resin in the central portion to result in large variations in thickness of the resin.
FIG. 5
illustrates a method of manufacturing a semiconductor device of another prior art presented in Japanese Patent No.2867954.
The manufacturing method in
FIG. 5
manufactures a semiconductor device by using a substrate including a plurality of recesses
12
in grid form in which a plurality of element connecting electrodes
2
a
are connected to external device connecting electrodes
2
d
via through holes
2
e
, respectively, disposing semiconductor element
3
within each of recesses
12
in the substrate, connecting semiconductor element
3
to element connecting electrode
2
a
with wire
4
, applying and curing resin
7
, and cutting the substrate.
Such a prior art has a disadvantage that, since recess
12
has a small area, each recess
12
is likely to contain foams at the application of resin
7
which may remain as foams in the resin portion of the semiconductor device after the cure of the resin, and that large variations tend to occur in thickness of the resin since the foams escape during the cure of the resin to reduce the thickness in those portions.
When each semiconductor device is cut at the A-A′ line in frame
1
b
, a certain width of the frame is required for the cutting, and accordingly, a smaller size of a semiconductor device is difficult to achieve.
When each semiconductor device is cut in the resin portion to avoid frame
1
b
(cutting at the B-B′ line), the number of obtained products per substrate is reduced corresponding to frames
1
b
which occupy a large area in substrate
1
, and additionally, many steps are required for the cutting, thereby making it difficult to reduce cost.
Furthermore, Japanese Patent Laid-open Publication No.11-67799 proposes, for “providing a method of manufacturing electronics capable of obtaining smoothness
Hotozuka Kouichi
Nomura Yukio
NEC Corporation
Sughrue & Mion, PLLC
Talbott David L.
Zarneke David A.
LandOfFree
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