Semiconductor device structure including multiple interconnectio

Details Semiconductor device structure including multiple interconnectio Semiconductor device structure including multiple interconnectio

1994-11-18

1996-03-26

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257774, 257775, 257786, H01L 2348

Patent

active

055023371

ABSTRACT:
The present invention relates to a bonding pad electrode structure having sufficiently large allowable current and improved to prevent generation of cracks in an interlayer insulating film by mechanical stress at the time of wire bonding. Interlayer insulating films are provided directly on a semiconductor substrate. An uppermost interconnection layer is provided on interlayer insulating films. Since a lower interconnection layer does not exist immediately below a portion of the uppermost interconnection layer used as a bonding pad, cracks are not generated in the interlayer insulating films at the time of wire bonding. Further, since the uppermost interconnection layer is connected to lower interconnection layers, the current entering the bonding pad is dispersed to these interconnection layers.

REFERENCES:
patent: 4636832 (1987-01-01), Abe et al.
patent: 5248903 (1993-09-01), Heim

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