Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-01-09
2003-02-11
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S424000, C438S425000, C438S426000, C257S510000, C257S513000
Reexamination Certificate
active
06518146
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a semiconductor device structure and more specifically to trench isolation structures.
RELATED ART
The ability to integrate a wider variety of devices and structures into a single integrated circuit allows for increased speed and efficiency while reducing costs. However, problems arise during the integration of these different devices and structures. For example, some integrated circuits require multiple types of shallow trench isolation having different properties. An embedded non-volatile memory (NVM), for example, requires good trench corner rounding for bitcell reliability, endurance, and uniform program/erase threshold voltage distribution. However, logic devices located within a same integrated circuit as the NVM require narrower trenches but with less severe corner rounding as compared to the trenches within the embedded NVM. Filling of these narrower trenches, though, may result in voids, thus limiting the yield of the integrated circuit. Therefore, a need exists for the formation of semiconductor device structures within an integrated circuit having different isolation properties and requirements.
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Ingersoll Paul A.
Singh Rana P.
Clingan, Jr. James L.
Dang Trung
King Robert L.
Motorola Inc.
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