Semiconductor device soldering process

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Patent

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Details

438112, 438118, 438123, 438466, H01L 2144, H01L 2148, H01L 2150

Patent

active

058307818

ABSTRACT:
A pair of metal lead frames are stacked together with a plurality of solder coated semiconductor chips sandwiched between respective pairs of overlapped portions of the lead frames and the lead frame stack is then disposed within a fixture comprising spaced apart clamping means for clamping together the overlapped portions of the lead frames. Only the clamping means contact the frame stack and in thermally and electrically insulated relation therewith for minimizing heat loss from and electrical shorting of the lead frame stack to the fixture. Electrodes are tightly clamped against exposed ends of the lead stack for passing electrical current through the stack for causing electrical resistance heating of the stack and the soldering of the chips to the lead frames.

REFERENCES:
patent: 4633582 (1987-01-01), Ching et al.
patent: 5001545 (1991-03-01), Kalfus et al.
patent: 5506174 (1996-04-01), Vandenheuvel et al.
patent: 5637917 (1997-06-01), Tomita et al.

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