Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2006-04-25
2006-04-25
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S007000, C438S008000, C438S009000
Reexamination Certificate
active
07033904
ABSTRACT:
A semiconductor device includes a first insulation layer including a first conductor pattern, a second insulation layer formed on the first insulation layer and including a second conductor pattern, and a third conductor pattern formed on the second insulation layer, wherein there is formed a first alignment mark part in the first insulation layer by a part of the first conductor pattern, the third conductor pattern is formed with a second alignment mark part corresponding to the first alignment mark part, the first and second alignment marks forming a mark pair for detecting alignment of the first conductor pattern and the third conductor pattern, the second conductor pattern being formed in the second insulation layer so as to avoid the first alignment mark part.
REFERENCES:
patent: 6841451 (2005-01-01), Okayama et al.
patent: 6-29183 (1994-02-01), None
patent: 2000-260702 (2000-09-01), None
patent: 2002-289507 (2002-10-01), None
Kawamura Eiichi
Kirikoshi Katsuyoshi
Fourson George
Fujitsu Limited
Maldonado Julio J.
Westerman, Hattori, Daniels & Adrian , LLP.
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