Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1995-01-19
1997-04-29
Wilczewski, Mary
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438296, 438981, H01L 2176, H01L 21762
Patent
active
056248660
ABSTRACT:
A semiconductor device with a trench element isolation structure having a trench element isolation film formed to have a small width at the boundary between an active region and a field region, thereby capable of obtaining an improved element isolation function while easily planarizing an insulating film formed in the trench. A thick oxide film is formed at the field region provided with no trench, thereby preventing formation of a parasitic capacitor between the semiconductor substrate and the gate electrode.
REFERENCES:
patent: 4578128 (1986-03-01), Mundt et al.
patent: 4597164 (1986-07-01), Havemann
patent: 4912062 (1990-03-01), Verma
patent: 5137837 (1992-08-01), Chang et al.
patent: 5177028 (1993-01-01), Manning
Hyundai Electronics Industries Co,. Ltd.
Wilczewski Mary
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