Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-11-23
2002-08-13
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
Reexamination Certificate
active
06432825
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device production method and in particular, to a semiconductor device production method capable of reducing a latent period immediately after a polishing start when polishing a metal film formed on a semiconductor wafer.
2. Description of the Related Art
These years, with reduction in wiring pitch, it has become difficult to perform a direct patterning of a metal wiring by the dry etching method, and the damascene method has begun to be used for metal wiring formation. That is, a groove is formed in the insulation film and a metal film is buried in this groove by way of CVD (chemical vapor deposition), sputtering, plating and the like. Then, an unnecessary metal film on the insulation film is polished away by chemical-mechanical polishing method (hereinafter, referred to as CMP). Thus a metal film is buried in the groove. Here, the polishing rate of the insulation film is set lower than the polishing rate of the metal film. Thus, the insulation film serves as a stopper so as to suppress the polishing of the metal film in the groove. However, various problems are involved in this polishing of the metal film. This will be explained with the polishing apparatus configuration and polishing procedure.
FIG. 4
is a cross sectional view of a basic configuration of a conventional polishing apparatus. A polishing pad
2
is mounted on a rotary platen
1
. Moreover, above the platen
1
, a carrier
3
is arranged to hold and pressurize a semiconductor wafer. This carrier
3
is connected directly to a spindle
4
and is rotatable. Moreover, the spindle
4
is supported by a polishing arm
5
in such a manner that the spindle
4
can move up and down. A semiconductor wafer is mounted on the carrier
3
with its polishing surface facing the polishing pad
2
. The platen
1
is rotated and the carrier
3
is lowered and pressurizes the semiconductor wafer. While abrasive is supplied to the polishing pad
2
, the carrier
3
is rotated in the same direction as the platen
1
. Thus, polishing is performed. Although not depicted, at the polishing pad side, there is provided a dressing mechanism for performing dressing during a polishing operation or between polishing operations. The abrasive normally contains oxidant and alumina particles or silica particles.
The metal film to be polished in the semiconductor device production procedure may be tungsten (W), aluminium (Al), copper (Cu) or the like. Moreover, considering the EM resistance and sufficient attachment of the wiring, the metal film has an undercoat made from Ti, TiN, TiW or the like.
FIG. 5
shows a polishing amount changing according to the time when polishing a wafer. Two curves are shown, corresponding two different positions on the wafer. This example is polishing behavior when polishing tungsten (W). As is clear from the figure, the polishing speed is very slow for 10 to 30 seconds immediately after the polishing start, and after this period, the polishing speed is abruptly increased. Thus, this polishing is characterized by a latent period T
0
when polishing hardly advances immediately after the polishing start.
Because of the aforementioned relationship between the polishing amount and time, the conventional semiconductor device production method has following problems.
Firstly, the aforementioned relationship between the polishing amount and time may deteriorate the uniformity on the wafer surface. As shown in
FIG. 5
, if the latent time differs within the wafer surface, the polishing amount also differs within the wafer surface. For example, in 50 seconds after polishing start, the polishing amount differs by as much as 150 nm. If the polishing amount differs extremely, then at the rapidly polished portion, the polishing advances more than necessary, causing configuration problems called dishing and erosion. Thus, it becomes impossible to satisfy the product specifications. Moreover, in the later step, sufficient flattening cannot be obtained, requiring a complicated additional step.
The second problem is that the polishing rate is not stable. If the latent time changes by several seconds, the polishing amount, for example, for 1 minute immediately after the polishing start is remarkably changed. The entire polishing time is as short as 1 or 2 minutes. Accordingly, the irregularities in the latent time T
0
affect much.
Moreover, Japanese Patent Publication A8-339982 [1] discloses a semiconductor device production method, in which infrared rays are used to detect an end of an appropriate polishing.
That is, in this invention of Citation [1], there is no technical concept of solving the problem of the latent period of time when polishing is hardly performed.
Furthermore, Japanese Patent Publication A9-55361 [2] discloses a semiconductor device production method in which a temperature regulator controls the temperature of the polishing surface via a semiconductor substrate, so as to control chemical polishing function of the slurry.
In the invention of Citation [2], temperature control is simply performed and there is no technical concept to suppress dishing using the oxide removal step and the flattening step.
Moreover, Japanese Patent Publication A8-339982 [3] discloses a semiconductor device production method, in order to effectively polish the insulation layer, Mn
2
O
3
or Mn
3
O
4
is used as an abrasive grain to be mixed with a solvent to constitute the abrasive.
Thus, this invention of citation [3] has no technical concept to solve the problem of the latent period of time when polishing is hardly performed.
SUMMARY OF THE INVENTION
The present invention has an object to provide a semiconductor device production method capable of improving the aforementioned conventional techniques so as to increase the uniformity on the surface and obtain stable polishing.
In order to attain the aforementioned object, the present invention employs the following basic techniques. That is, a first embodiment of the present invention provides a semiconductor device production method in which the metal film polishing includes an oxide removal step for removing oxide from the surface to be polished, so as to reduce the latent time immediately after polishing start when the polishing speed is extremely low. A second embodiment provides a semiconductor device production method in which the polishing step is preceded by a flattening step to flatten irregularities of the surface of the object to be polished, i.e., the metal film.
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Wolf, Silicon Processing for the VLSI Era, vol. 2—Process Integration, 1990, pp. 199-200.
Anderson Matthew
NEC Corporation
Utech Benjamin L.
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