Semiconductor device package having features formed by stamping

Details Semiconductor device package having features formed by stamping Semiconductor device package having features formed by stamping

2008-08-14

2010-11-23

Toledo, Fernando L (Department: 2895)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S121000, C438S125000, C438S127000, C029S829000, C257S666000, C257S669000, C257S676000, C257S674000, C257S678000, C257S690000, C257S692000, C257S696000, C257S734000, C257S735000, C257S773000, C257S775000, C257S784000, C257S787000, C257SE23031, C257SE21499

Reexamination Certificate

active

07838339

ABSTRACT:
Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features.

REFERENCES:
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patent: 2008/0122048 (2008-05-01), Chan et al.
patent: 62030358 (1987-02-01), None

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