Semiconductor device package having end-face halved through-hole

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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Details

257693, 257738, 257698, 257678, H01L 2348, H01L 2302, H01L 2352

Patent

active

059629177

ABSTRACT:
A semiconductor device package comprises a circuit substrate, a semiconductor device chip mounted on the circuit substrate, a plurality of end-face halved through-holes formed on an end-face of the circuit substrate, in the form obtained by halving a through hole along its center axis, and having an inner side surface coated with a conductor film, a plurality of wiring conductors formed on an upper surface of the circuit substrate and connected to the end-face halved through-holes, a plurality of external electrode conductors formed on a lower surface of the circuit substrate and connected to the end-face halved through-holes, and a solder resist provided to partially cover the external electrode conductors for separating an end of the external electrode conductors from the end-face halved through-holes. The semiconductor device package further includes a plurality of inside-area through-holes formed in an area of the circuit substrate other than the end-face of the circuit substrate, a plurality of additional external electrode conductors formed on the other surface of the circuit substrate and connected to the inside-area through-holes, and an additional solder resist provided to partially cover the additional external electrode conductors for separating an end of the additional external electrode conductors from the inside-area through-holes.

REFERENCES:
patent: 2971138 (1961-02-01), Meisel et al.
patent: 4691225 (1987-09-01), Murakami et al.
patent: 5216278 (1993-06-01), Lin et al.
patent: 5241133 (1993-08-01), Mullen, III et al.
patent: 5729437 (1998-03-01), Hashimoto
patent: 5796170 (1998-08-01), Marcantonio

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