Semiconductor device output buffer circuit for LSI

Details Semiconductor device output buffer circuit for LSI Semiconductor device output buffer circuit for LSI

1997-09-29

2000-06-06

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327589, 326 88, 307 35, 307110, 36518909, 365226, H03K 1716

Patent

active

060723548

ABSTRACT:
In a semiconductor device having a plurality of output circuits such as a semiconductor memory device, a drive signal having a boosted voltage level which is produced from a boosting circuit is applied to a gate of a low-level outputting MOS transistor in the output circuit. As a result, even when a potential at the ground wiring line is floated, a substantial decrease of a potential difference between the ground wiring line and the gate of the low-level outputting MOS transistor can be prevented. Also, a signal having a sufficiently high level can be supplied to a gate of a low-level outputting output MOS transistor. As a consequence, delays in the switching operation of the output MOS transistor can be suppressed, and the output circuit can be operated at high speed.

REFERENCES:
patent: 4583203 (1986-04-01), Monk
patent: 5563080 (1996-10-01), Ahn
patent: 5594380 (1997-01-01), Nam
patent: 5621342 (1997-04-01), Wong et al.

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