Semiconductor device monolithically comprising a V-MOSFET and bi

Details Semiconductor device monolithically comprising a V-MOSFET and bi Semiconductor device monolithically comprising a V-MOSFET and bi

1984-10-30

1986-05-13

Carroll, James J.

357 238, 357 41, 357 43, 357 88, H01L 2978, H01L 2702

Patent

active

045890048

ABSTRACT:
A semiconductor device comprising a high voltage withstanding vertical MOSFET and a low voltage withstanding element both formed on a single chip. A buried layer of a high impurity concentration is formed in a region where the vertical MOSFET is formed, and another buried layer of a high impurity concentration is formed in a region where the low voltage withstanding element is formed. These buried layers have different thickness, whereby the series resistance of a circuit adjacent to the vertical MOSFET is reduced without lowering the withstand voltage of the vertical MOSFET.

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F. Barson, "Integrated Complementary Field-Effect and Bipolar Transistor Process", IBM Technical Disclosure Bulletin, vol. 17 (1974) pp. 86-87.

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