Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Reexamination Certificate
1999-09-24
2003-01-07
Reichard, Dean A. (Department: 2831)
Electricity: conductors and insulators
Boxes and housings
Hermetic sealed envelope type
C257S704000, C257S707000, C257S712000, C257S713000
Reexamination Certificate
active
06504096
ABSTRACT:
RELATED APPLICATION DATA
The present application claims priority to Japanese Application No. P10-275925 filed Sep. 29, 1998 which application is incorporated herein by reference to the extent permitted by law.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packaged semiconductor device comprised of a semiconductor chip mounted while preventing a reduction of characteristics and to a method of production of the same.
Further, the present invention relates to a method for mounting a semiconductor chip or filter chip or other component on a substrate, more particularly relates to a method of mounting preferred for mounting a semiconductor chip or component for high speed, high frequency applications.
2. Description of the Related Art
In recent years, advances in cellular telephones, integrated service digital networks (ISDNs), personal computers (PC), and other information communication (network) technologies have led to attempts to mount high frequency communication blocks, high speed serial interfaces, etc. in a variety of apparatuses.
When mounting such a high speed, high frequency circuit block in an apparatus, it is necessary to assemble this circuit block at low cost and compactly. In addition, a method of mounting taking in account high speed operation, reduction of noise, etc. has been demanded.
Due to such demands, attention has been paid to multi-chip modules, (MCM) flip-chip mounting, and other bare chip mounting technologies as methods for mounting semiconductor chips.
In flip-chip mounting, usually a projecting electrode (bump) is formed on each of the input-output (I/O) pads of the semiconductor chip and the semiconductor chip is turned faced down and connected to a substrate by solder or the like. For this reason, flip-chip mounting has the characteristic features that the wiring paths are formed shorter compared with a case of connection using wire-bonding or the like, a low inductance, a low capacitance, and a low resistance can be realized, operation is high in speed, and the high frequency characteristics are excellent.
FIG. 18
shows an example of the configuration in the case where a semiconductor chip is mounted on a mother board by the flip-chip technology.
In order to achieve this mounting structure
100
, high melting point solder bumps
104
are formed in advance on the I/O pads of the semiconductor chip
102
. Further, solder
108
is precoated at predetermined positions on interconnection patterns
106
a
on the mother board
106
.
In this state, the semiconductor chip
102
is turned face down and positioned onto the mother board
106
. The two are then connected by applying heat and pressure.
Next, a connection portion of the semiconductor chip
102
and the mother board
106
is filled with a resin
110
so as to relieve the thermal stress applied to the soldered portions, to protect the surface of the semiconductor chip
104
, or due to other demands for reliability.
Summarizing the problems to be solved by the invention, in this flip-chip connection method, however, the interconnections on the semiconductor chip
102
are further covered by an organic substance (resin
110
) other than a protective layer
102
a
at the surface. As a result, an increase of a parasitic capacitance component or other change of impedance occurs.
Particularly, in the case of microwave monolithic integrated circuits (MMIC), some high speed digital ICs, and the like where the interconnections are formed by microstrip lines, coplanar lines, or the like, this change in the impedance detracts from the impedance matching and other optimum design conditions and results in the various characteristics being lowered from their design values.
Further, changes occur in the constants of spiral inductors or other passive elements and, in addition, the characteristics are degraded due to a dielectric loss.
Further, the addition of the organic substance on to the top part of field effect transistors (FET) causes an increase of a gate capacitance and becomes a cause of a reduction of the noise factor.
This change in impedance causes serious changes in the characteristics in surface acoustic wave (SAW) filters and other filters based on a vibration mode of a surface acoustic wave.
On the other hand, particularly in the case of a high frequency semiconductor circuit, usually it is necessary to metalize the back of the semiconductor chip
102
and to sufficiently stably ground this back surface metal. This is because, in for example MMICs, the interconnections are frequently formed by using microstrip lines or coplanar (grounded coplanar) lines.
In the flip-chip mounting structure as shown in
FIG. 18
, however, there is the disadvantage that the back surface metal cannot be sufficiently stably reduced to the ground potential.
Further, particularly in ICs comprised of high power circuits etc., the heat generation is also large. It many cases, a structure where the chip back surface is connected to the mother board via a conductive layer by die bonding as in the related art becomes necessary.
In the flip-chip mounting structure shown in
FIG. 18
, however, when mounting an IC having high power circuits, air cooling from the chip back side alone is not sufficient for dissipation of the heat. As a result, there is a strong apprehension of a reduction of the output power of the IC or other reductions in characteristics.
For this reason, in particular for mounting a semiconductor chip for high speed, high frequency applications or where a high output power is required, the conventional mounting method, that is, the method of die-bonding the semiconductor chip with its element forming surface facing upward, connecting the terminals by wire bonding, then performing a complex sealing step in a nitrogen atmosphere for accommodating the chip in a hollow package, has been adopted.
Accordingly, due to the complicated process, the need for expensive and large size packages of ceramic and metal, and the high cost of this mounting method, a small size and low cost mounting method for high speed, high frequency applications or high power usages has been strongly demanded.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a packaged semiconductor device having high characteristics and reliability and low cost.
Another object of the present invention is to provide a method of mounting a semiconductor chip or other component which enables a small parasitic inductance etc. and facilitates heat dissipation and ground while using flip-chip mounting and which results in excellent characteristics and reliability and low cost.
According to a first aspect of the present invention, there is provided a semiconductor device comprising a package board having interconnection patterns on one main surface, a semiconductor chip electrically connected through internal terminations to interconnection patterns of the package board and having an element forming surface facing the package board across a space, and a conductive plate connected to a back surface of the semiconductor chip of a side opposite to the element forming surface through a conductive bonding layer, the semiconductor chip being sealed in a resin formed in a circumferential direction in the space between the package board and the conductive plate.
Preferably, the one main surface of the package board is provided with a depression enlarging the space in the thickness direction of the package board.
Preferably, the device further comprises external terminations formed on the other main surface of the package board and electrically connected to corresponding interconnection patterns and connectors formed in the resin and electrically connecting the conductive plate to the interconnection patterns electrically connected to external terminations for supply of a reference potential.
More preferably, the element forming surface of the semiconductor chip is formed with a circuit, electrode pads for an input signal or an output signal of the circuit are provided at opposite two sides among the four s
Oliva Carmelo
Reichard Dean A.
Sonnenschein Nath & Rosenthal
Sony Corporation
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