Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2006-10-31
2006-10-31
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S619000
Reexamination Certificate
active
07129565
ABSTRACT:
A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the like, the stress is dispersed to the main wall part and the sub-wall part, and hence peeling between layers and a crack are unlikely to occur, as compared with the conventional art. Further, even if the crack and the like occur at the corner, moisture from the outside hardly reaches the integrated circuit part when the main wall part and the sub-wall part are coupled to each other. For this reason, it is possible to ensure an extremely high moisture resistance.
REFERENCES:
patent: 4591945 (1986-05-01), Ugon
patent: 5834829 (1998-11-01), Dinkel et al.
patent: 5846874 (1998-12-01), Hartranft et al.
patent: 5858580 (1999-01-01), Wang et al.
patent: 5883001 (1999-03-01), Jin et al.
patent: 6022791 (2000-02-01), Cook et al.
patent: 6043551 (2000-03-01), Seshan
patent: 6335128 (2002-01-01), Cobb et al.
patent: 6365958 (2002-04-01), Ibnabdeljalil et al.
patent: 2002/0125577 (2002-09-01), Komada
patent: 0 707 341 (1996-04-01), None
patent: 63-232447 (1988-09-01), None
patent: 10-98014 (1998-04-01), None
patent: 2001-274338 (2001-10-01), None
patent: WO 00/14801 (2000-03-01), None
Wolf et al., Silicon Processing for the VLSI Era, 2000, vol. I, Lattice Press, 719-720, 779-782.
European Search Report and Annex dated Nov. 16, 2004 (Search dated Nov. 5, 2004).
Office Action from Patent Office of China from Corresponding Chinese Application dated Jul. 8, 2003.
Hasegawa Takumi
Kawano Michiari
Namba Hiroshi
Sawada Toyoji
Sukegawa Kazuo
Andujar Leonardo
Fujitsu Limited
Westerman, Hattori, Daniels & Adrian , LLP.
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