Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2002-03-06
2004-08-31
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S113000, C438S118000, C438S455000
Reexamination Certificate
active
06784021
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a chip assembly formed by stacking a plurality of chips, a method of fabricating the same and a semiconductor device fabricating apparatus.
2. Background Art
A conventional semiconductor device having a high integration level has a plurality of chips of different types stacked on a single die pad for high integration. A method of fabricating such a conventional semiconductor device will be briefly described with reference to
FIG. 3
illustrating a process for fabricating the semiconductor device.
Shown in
FIG. 3
are a second wafer
1
a
divided into second chips
3
a
by dicing, a first wafer
1
b
divided into first chips
3
b
by dicing, a first collet
5
a
for holding and carrying the first chip
3
b
from the first wafer
1
b
to a die pad
12
mounted on a stage, a second collet
5
b
for holding and carrying the second chip
3
a
from the second wafer
1
a
to the die pad
12
, a second bonding layer
7
a
for bonding the second chip
3
a
to the first chip
3
b
, a first bonding layer
7
b
for bonding the first chip
3
b
to the die pad
12
, a semiconductor device
15
fabricated by stacking up the chips
3
a
and
3
b
, and die bonders
20
a
and
20
b
included in a semiconductor device fabricating apparatus.
Referring to
FIG. 3
, the first wafer
1
b
is mounted on a wafer holder, not shown, included in the first die bonder
20
a
. A wafer cassette, not shown, holding a plurality of first wafers
1
b
therein is carried to the first die bonder
20
a
. The first wafer
1
b
is conveyed from the wafer cassette to the wafer holder by a wafer conveying device. The first wafer
1
b
is divided into a plurality of first chips
3
b
by dicing.
One of the first chips
3
b
is picked up from the first wafer
1
b
by the first collet
5
a
. The first collet
5
a
carries the first chip
3
b
having a back surface coated with the first bonding layer
7
b
to a position above a stage holding a leadframe provided with a die pad
12
.
The stage is heated, the first collet
5
a
is lowered in the direction of the arrow to press the first chip
3
b
provided with the bonding layer
7
b
against the die pad
12
to bond the first chip
3
b
to the die pad
12
. Then, the die pad
12
is carried away from the first die bonder
20
a.
The die pad
12
supporting the first chip
3
b
thereon is carried to a stage, not shown, included in the second die bonder
20
b
. The second wafer
1
a
is mounted on a wafer holder, not shown, included in the second die bonder
20
b
. A wafer cassette, not shown, holding a plurality of second wafers
1
a
therein is carried to the second die bonder
20
b
. The second wafer
1
a
is conveyed from the wafer cassette to the wafer holder by a wafer conveying device. The second chips
3
a
of the second wafer
1
a
are of a kind different from that of the first chips
3
b
of the first
1
b
; that is, the first chip
3
b
of the first wafer
1
b
and the second chip
3
a
of the second wafer
1
a
are provided with different elements and circuits, respectively, and have different sizes, respectively.
The second collet
5
b
picks up one of the second chips
3
a
of the second wafer
1
a
having a back surface coated with a bonding layer
7
a
and carries the same to the stage supporting leadframe provided with the die pad
12
.
The stage is heated, the second collet
5
b
is lowered in the direction of the arrow, and the second chip
3
a
is pressed against the first chip
3
b
mounted on the die pad
12
to bond the second chip
3
a
to the first chip
3
b
. Thus, the two chips
3
a
and
3
b
are stacked on the die pad
12
.
The number of the die bonders necessary for carrying out this conventional semiconductor device fabricating method is equal to that of the chips to be stacked on the die pad. A bonding process for bonding the lower chip to the die pad is carried out by a first die bonder, and a bonding process for bonding the upper chip to the lower chip bonded to the die pad is carried out by a second die bonder. Thus, each bonding process needs one die bonder.
If a single die bonder is used for carrying out the plurality of bonding processes, the arrangements of the die bonder must be changed for each bonding process, which reduces the operating ratio of the die bonder. When a plurality of die bonders are assigned to a plurality of bonding processes, respectively, each die bonder operates at a high operating ratio. However, the transfer of one die pad from one to another die bonder needs a comparatively long process time, which is an impediment to the improvement of the efficiency of the semiconductor device fabricating apparatus for the mass production of semiconductor devices. When a plurality of die bonders are used, a large-scale semiconductor device fabricating apparatus is necessary and such a semiconductor device fabricating apparatus needs a large equipment investment.
SUMMARY OF THE INVENTION
The present invention has been made to solve such problems and it is therefore an object of the present invention to provide a semiconductor device fabricating method which can be carried out by a comparatively inexpensive semiconductor device fabricating apparatus of a relatively small scale in a short process time.
Another object of the present invention is to provide a comparatively inexpensive semiconductor device fabricating apparatus of a comparatively small scale capable of fabricating a semiconductor device including a chip assembly formed by stacking a plurality of chips in a short process time.
A third object of the present invention is to provide a semiconductor device including a chip assembly formed by stacking a plurality of chips, and fabricated by the semiconductor device fabricating method according to the present invention using the semiconductor device fabricating apparatus according to the present invention.
According to one aspect of the present invention, in a semiconductor device fabricating method, a plurality of wafers each having a plurality of chips is carried into a die bonder and is placed in the die bonder. A plurality of chips, which is taken out from the plurality of wafers respectively and superposed in a stack, is bonded together by each bonding layer to form a chip assembly. The chip assembly is bonded to a die pad by another bonding layer.
According to another aspect of the present invention, a semiconductor device is fabricated by the above semiconductor device fabricating method.
According to another aspect of the present invention, a semiconductor device fabricating apparatus comprises a plurality of wafer holders for holding a plurality of wafers, respectively. The apparatus comprises a chip conveying device for conveying one chip from each of the plurality of wafers held by the plurality of wafer holders, and a preparatory stage having a support surface on which chips conveyed from the plurality of wafers by the chip conveying device are stacked up and are bonded together by bonding layers to form a chip assembly. The apparatus further comprises a chip assembly conveying device for conveying the chip assembly from the preparatory stage onto a die pad, and a stage on which the chip assembly is bonded to the die pad by a bonding layer.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
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patent: 5804004 (1998-09-01), Tuckerman et al.
patent: 5952725 (1999-09-01), Ball
patent: 5979739 (1999-11-01), Jin et al.
patent: 6620651 (2003-09-01), He et al.
patent: 2001/0013643 (2001-08-01), Nakanishi et al.
patent: 6-151701 (1994-05-01), None
patent: 10-32307 (1998-02-01), None
patent: 2000-269243 (2000-09-01), None
patent: 2000-294724 (2000-10-01), None
Abe Shun-ichi
Izumi Naoki
Uebayashi Tetsuya
Yamazaki Akira
Niebling John F.
Roman Angel
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