Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2008-09-10
2011-11-22
Mandala, Victor A (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257SE23002, C257SE21545, C438S401000
Reexamination Certificate
active
08063468
ABSTRACT:
A semiconductor device includes a semiconductor chip, a moisture resistant ring provided in the semiconductor chip and having a chamfered flat part in a position corresponding to a corner of the semiconductor chip, and a first monitor pattern formed inside the moisture resistant ring. At least a part of the first monitor pattern is disposed inside an n-sided polygonal area (n is a natural number which is 4 or higher than 4) situated within the moisture resistant ring, and outside a quadrangular area situated inside the n-sided polygonal area. The n-sided polygonal area has a vertex at least at each of a first end and a second end of the chamfered flat part, and the quadrangular area has a vertex at least at a middle point of the chamfered flat part.
REFERENCES:
patent: 2005/0263855 (2005-12-01), Fu et al.
patent: 60-083344 (1985-05-01), None
patent: 08-148490 (1996-06-01), None
Fujita Kazushi
Nanjo Ryota
Fujitsu Semiconductor Limited
Mandala Victor A
Staas & Halsey , LLP
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