Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
2000-06-28
2001-12-25
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
C438S680000, C438S707000, C438S710000, C438S714000, C438S732000, C438S758000, C438S778000
Reexamination Certificate
active
06333246
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No.11-186701, filed Jun. 30, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method using an electrostatic chuck and a semiconductor device manufacturing system in which this method is applied, and particularly to a semiconductor manufacturing method including a step of applying a voltage to an electrostatic chuck which is placed in a process chamber in order to hold a substrate to be processed, and a semiconductor manufacturing system in which the foregoing method is applied.
2. Description of the Related Art
There is known a semiconductor manufacturing system in which an electrostatic chuck is placed on a substrate stand in a process chamber, and a substrate to be processed is processed while it is stuck onto the electrostatic chuck. The electrostatic chuck is constituted by a conductive layer and insulating layers covering the opposite surfaces of the conductive layer. The conductive layer is a thin copper (Cu) film or a thin tungsten (W) film or the like. The insulating layers are polyimid insulator sheets or ceramic insulator sheets or the like. With this electrostatic chuck, a DC voltage is applied to the conductive layer in order to induce electric charge on the insulating layer between the conductive layer and the substrate and to stick the substrate onto the electrostatic chuck using static electricity.
Two types of electrostatic chucks are available at present. One of them is a mono pole type electrostatic chuck including a flat conductive layer whose shape is identical to a substrate to be processed. The other is a multi pole type electrostatic chuck having a conductive layer divided into a plurality of flat parts which are shaped identical to the substrate, and are applied DC voltages having different polarities.
A semiconductor device is manufactured by a manufacturing system including the foregoing electrostatic chuck, in the following manner.
(1) First of all, a DC voltage is applied to the electrostatic chuck placed on a substrate stand in a process chamber. The substrate stand also functions as a processing electrode. Alternatively, a processing electrode is provided on the substrate stand. Because of the applied DC voltage, electric charges are accumulated on the surface of the electrostatic chuck.
(2) In this state, a substrate to be processed is brought on the electrostatic chuck and is stuck onto it. The substrate is a semiconductor wafer made of single crystal silicon (Si), for example.
(3) A process gas is introduced into the process chamber. Pressure inside the process chamber is appropriately controlled to a predetermined value. In this state, a high frequency power or the like is applied to the processing electrode, thereby generating discharge plasma in the process chamber.
(4) The surface of the substrate or a particular thin film formed on the surface of the substrate is processed as predetermined by the process gas introduced into the process chamber or discharge plasma generated in the process chamber. In this case, the thin film on the substrate is etched, or a further thin film is formed on the thin film of the substrate.
(5) Thereafter, introduction of the process gas is stopped, generation of discharge plasma is suspended, and application of the DC voltage to the electrostatic chuck is stopped.
(6) The processed substrate is released from the electrostatic chuck, and is taken out of the process chamber.
The foregoing process seems to suffer from the following problems. A positive voltage with respect to the ground potential is applied to the conductive layer of the mono pole type electrostatic chuck. Then, the substrate to be processed is stuck onto the electrostatic chuck in order to prevent the substrate from slipping or being displaced on the substrate stand, or the like. When the DC voltage is applied to the electrostatic chuck, positive charges are induced on the electrostatic chuck. Since particles present in the process chamber are usually charged to a negative voltage, they are attracted onto the surface of the electrostatic chuck. Positive charges are also induced on the surface of the substrate stuck onto the electrostatic chuck, which means that particles are also attracted onto the substrate. If dry etching is performed in this state, particles on the substrate serve as an etching mask. As a result, the substrate cannot be dry-etched as desired, and are not usable, which means reduced yield of manufactured semiconductor devices.
This kind of problem is also present in the CVD (chemical vapor deposition), sputtering and so on in which plasma is used.
SUMMARY OF THE INVENTION
The invention has been contemplated in order to overcome the foregoing problems of the related art. A first object of the invention is to provide a semiconductor device manufacturing method which can reduce particles on a substrate being processed and improve manufacturing yield of the semiconductor devices manufacturing method, and more particularly to provide a semiconductor device manufacturing method in which particles can be reduced on the substrate being process during the whole manufacturing steps, and improve manufacturing yield.
It is a second object of the invention to provide a semiconductor device manufacturing method which can reduce particles on the substrate at least immediately prior to the processing of the substrate and improve manufacturing yield.
A third object of the invention is to provide a semiconductor device manufacturing method which can reduce particles on a substrate when the substrate is being processed, and to improve manufacturing yield.
According to a fourth object of the invention, there is provided a semiconductor device manufacturing method which can not only reduce particles on a substrate but also prevent particles from sticking onto a processed substrate, and can improve manufacturing yield. With this method, it is possible to shorten time for changing steps, which means a total manufacturing time is shortened.
It is a fifth object of the invention to provide a semiconductor device manufacturing method which can prevent particles from sticking onto a substrate when it is processed using at least discharge plasma, and improve manufacturing yield.
A sixth object of the invention is to provide a semiconductor device manufacturing method which can prevent particles from sticking onto a substrate after it is processed using at least discharge plasma, and improve manufacturing yield.
A final object of the invention is to provide a semiconductor device manufacturing system which is used to manufacture a semiconductor device using any of the methods according to the first to sixth objects.
In accordance with a first feature of the invention, a semiconductor device manufacturing method comprises the steps of: (1) placing a substrate to be processed on a mono pole type electrostatic chuck on a substrate stand in a process chamber, applying a negative voltage with respect to the ground potential to the electrostatic chuck, and sticking the substrate onto the electrostatic chuck; and (2) performing predetermined processing on the substrate with the negative voltage applied to the electrostatic chuck.
The term “process chamber” refers to a process chamber of a dry etching system, plasma enhanced CVD system or sputtering system, and preferably refers to a process chamber in which plasma is generated and a substrate is processed using plasma. Further, the term includes a process chamber of the sputtering system in which plasma is used but high frequency power cannot be applied to an electrode for holding a substrate. “Plasma” is preferably generated by a plasma system such as a diode parallel plate plasma enhanced system, an electron cyclotron resonance plasma enhanced system, an inductively-coupled plasma enhanced system or the like. The term “
Aoki Katsuaki
Fujita Hiroshi
Matsui Isao
Narita Masaki
O Takashi
Finnegan, Henderson & Farabow, Garrett & Dunner, L.L.P
Gurley Lynne A.
Kabushiki Kaisha Toshiba
Niebling John F.
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