Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate
2002-11-12
2004-12-07
Trinh, Michael (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
C257S717000, C257S704000, C257S778000
Reexamination Certificate
active
06828676
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor device manufacturing method, a semiconductor device, and a semiconductor device unit, and particularly to a manufacturing method of a semiconductor device having a structure in which a lid is implemented on a semiconductor chip, a semiconductor device, and a semiconductor device unit.
2. Description of the Related Art
With the high-level densification of the semiconductor device in recent years, there is a growing tendency towards an increase in heat generated by the semiconductor chip. In response, a lid is implemented on the semiconductor chip in order to efficiently cool the semiconductor chip.
On the other hand, high reliability is also demanded in a semiconductor device. Thus, the desired semiconductor device is a highly reliable semiconductor device that is provided with a lid but does not suffer stress or separation in between said lid and the semiconductor chip.
The semiconductor of the BGA (Ball Grid Array) type having a structure in which a semiconductor chip is mounted on a substrate and external terminals such as solder balls are implemented on the surface opposite the surface that accommodates the semiconductor chip, is well-know in the conventional art. Also, in response to the increase in the heat generation of the semiconductor chip due to the speed-up and high-level densification of the semiconductor chip, a semiconductor device with a lid for efficient thermal dissipation implemented on the upper portion of the semiconductor chip is provided in the conventional art.
FIG.
1
and
FIG. 2
show the above-described semiconductor device according to the conventional art. The semiconductor device
1
A shown in
FIG. 1
has a semiconductor chip
2
mounted on the upper surface of a multi-layered resin substrate
3
and solder balls
4
, which are the external terminals, implemented on the lower surface of the substrate
3
.
The semiconductor chip
2
is provided with bumps
6
and is bonded to the substrate
3
through flip chip bonding. Also, in order to strengthen the bonding between the semiconductor chip
2
and the substrate
3
, an under fill material
7
is placed in between the semiconductor chip
2
and the substrate
3
.
Lid
5
A is, for example, made of metal, which has high thermal conductivity. In the conventional art, this lid
5
A is bonded directly onto the upper surface of the semiconductor chip
2
using bonding material
8
.
On the other hand, the semiconductor device
1
B shown in
FIG. 2
has a lid
5
B with a protrusion
9
at its center portion. By providing the protrusion
9
on the lid
5
B, the distance between the substrate
3
and the lid
5
B can be augmented so that other electronic components such as a condenser (not shown in the drawing) can be implemented between the substrate
3
and the lid
5
B.
Also, in the semiconductor device
1
B shown in
FIG. 2
, a frame
10
, supporting the lid
5
B, is placed on the outer perimeter of the substrate
3
. By providing the frame
10
, the lid receives support not only from the semiconductor chip
2
but also from this frame
10
so that the load applied to the semiconductor chip can be reduced.
As mentioned above, the substrate
3
forming the semiconductor device
1
A and
1
B is a resin substrate, and the semiconductor chip
2
is made of semiconductor material such as silicon. Therefore, the coefficient of thermal expansion of the semiconductor chip
2
and the substrate
3
are different. Also, upon the flip chip bonding of the semiconductor chip
2
to the substrate
3
, a heating process is performed on the bumps
6
for melting said bumps
6
, and in the heating process for the flip chip bonding, the heat also ends up being applied to the semiconductor chip
2
and the substrate
3
. Thus, warping occurs in the semiconductor chip
2
due to the difference in the coefficient of thermal expansion between the semiconductor chip
2
and the substrate
3
.
A description of the problem arising from bonding the lid
5
A to the above-described warped semiconductor chip
2
is given with reference to FIG.
3
. As previously mentioned, in the conventional art the lid
5
A is directly bonded to the semiconductor chip
2
using bonding material
8
. Thermosetting resin is normally used as the bonding material
8
, and a curing process (heating process) is performed upon the bonding.
When the curing process is performed upon the bonding of the lid
5
A as described above, the semiconductor chip
2
is re-straightened from its warped form. Specifically, the semiconductor chip
2
attempts to change shape from its warped state (the state shown in
FIG. 3
) to the position (shape) indicated by the chain line A shown in the same drawing.
Since the bonding material
8
is placed in between the semiconductor chip
2
and the lid
5
A, a compression force from the above described changing of shape of the semiconductor chip
2
works on the outer portion of the bonding material
8
(referred to as outer perimeter bonding portion
8
A hereinafter). Additionally, a stretching force works on the inner portion of the bonding material
8
(referred to as inner perimeter bonding portion
8
B hereinafter).
When differing forces work in the bonding material
8
upon the bonding of the semiconductor chip
2
and the lid
5
A as described above, internal stress and voids may be generated therefrom. When internal stress is generated in the bonding material
8
, cracks can be formed in the areas where the internal stress is generated.
Also, when voids are formed within the bonding material
8
, a fissure may occur in the bonding material, or in the worst case the lid
5
A may be separated from the semiconductor chip. This problem can be slightly ameliorated by making the bonding material
8
thicker; however, this also lowers the thermal conductivity of the bonding material layer
8
thereby causing a decrease in thermal dissipation efficiency with regard to the semiconductor chip
2
.
SUMMARY OF THE INVENTION
The present invention has been developed in response to the above-described problems, and its object is to provide a semiconductor device manufacturing method, a semiconductor device, and a semiconductor device unit, capable of maintaining high thermal dissipation efficiency of the semiconductor device as well as improving its reliability.
To this end, the present invention resorts to each of the following measures.
First, the present invention provides a manufacturing method of a semiconductor device having a semiconductor chip mounted on a substrate, and a lid thermally connected to said semiconductor chip, the method including steps of:
implementing a stiffener, which prevents the deformation of the semiconductor chip, on the side of the semiconductor chip that accommodates the lid;
bonding the semiconductor chip accommodating the stiffener to the substrate through heating; and,
bonding the stiffener to the lid with a bonding material after bonding the semiconductor chip accommodating the stiffener to the substrate.
Preferably, the stiffener is selected from a material that has substantially the same coefficient of thermal expansion as that of the semiconductor chip.
Second, the present invention provides a semiconductor device having a semiconductor chip provided with bumps, a stiffener bonded to the semiconductor chip by a first bonding material and preventing the deformation of the semiconductor chip, a substrate on which the semiconductor chip is mounted via the bumps, and a lid bonded to said stiffener with a second bonding material, wherein the relation between the melting point of the first bonding material denoted as T1, the melting point of the bumps denoted as Tb, and the melting point of the second bonding material denoted as T2 can be described as T1>Tb>T2.
Preferably, the stiffener is made of material that has substantially the same coefficient of thermal expansion as that of said semiconductor chip.
Third, the present invention provides a semiconductor device unit comprising a
Staas & Halsey , LLP
Trinh Michael
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